• Swati Sharma's avatar
    drm/i915/color: Extract icl_read_luts() · b4ab7aa8
    Swati Sharma authored
    For icl+, have hw read out to create hw blob of gamma
    lut values. icl+ platforms supports multi segmented gamma
    mode by default, add hw lut creation for this mode.
    
    This will be used to validate gamma programming using dsb
    (display state buffer) which is a tgl specific feature.
    
    v2: -readout code for multisegmented gamma has to come
         up with some intermediate entries that aren't preserved
         in hardware (Jani N)
        -linear interpolation (Ville)
        -moved common code to check gamma_enable to specific funcs,
         since icl doesn't support that
    v3: -use u16 instead of __u16 [Jani N]
        -used single lut [Jani N]
        -improved and more readable for loops [Jani N]
        -read values directly to actual locations and then fill gaps [Jani N]
        -moved cleaning to patch 1 [Jani N]
        -renamed icl_read_lut_multi_seg() to icl_read_lut_multi_segment to
         make it similar to icl_load_luts()
        -renamed icl_compute_interpolated_gamma_blob() to
         icl_compute_interpolated_gamma_lut_values() more sensible, I guess
    v4: -removed interpolated func for creating gamma lut values
        -removed readouts of fine and coarse segments, failure to read PAL_PREC_DATA
         correctly
    v5: -added gamma_enable check inside read_luts()
    v6: -renamed intel_color_lut_entry_equal() to intel_color_lut_entries_equal() [Ville]
        -changed if-else to switch [Ville]
        -removed intel_color_lut_entry_multi_equal() [Ville]
    v7: -checkpatch warnings
    v8: -rebased
    v9: -rebased, aligned with Ville's style of gamma cleanup
    Signed-off-by: default avatarSwati Sharma <swati2.sharma@intel.com>
    Reviewed-by: default avatarMika Kahola <mika.kahola@intel.com>
    Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20200317135736.14305-1-swati2.sharma@intel.com
    b4ab7aa8
i915_reg.h 480 KB