• Chen-Yu Tsai's avatar
    pinctrl: sunxi: Consider pin_base when calculating regulator array index · ca443844
    Chen-Yu Tsai authored
    On most newer Allwinner SoCs, there are two pinctrl devices, the PIO and
    R_PIO. PIO covers pin-banks PA to PI (PJ and PK have not been seen),
    while R_PIO covers PL to PN. The regulator array only has space for 12
    entries, which was designed to cover PA to PL. On the A80, the pin banks
    go up to PN, which would be the 14th entry in the regulator array.
    However since the driver only needs to track regulators for its own pin
    banks, the array only needs to have 9 entries, and also take in to
    account the value of pin_base, such that the regulator for the first
    pin-bank of the pinctrl device, be it "PA" or "PL" uses the first entry
    of the array.
    
    Base the regulator array index on pin_base, such that "PA" for PIO and
    "PL" for R_PIO both take the first element within their respective
    device's regulator array.
    
    Also decrease the size of the regulator array to 9, just enough to cover
    "PA" to "PI".
    
    Fixes: 9a2a566a ("pinctrl: sunxi: Deal with per-bank regulators")
    Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
    Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
    ca443844
pinctrl-sunxi.c 35.8 KB