• Heiko Stuebner's avatar
    ARM: dts: rockchip: temporarily disable smp on rk3288 · b77d4394
    Heiko Stuebner authored
    Stock firmware on rk3288 does not initizalize the CNTVOFF registers
    of the architected timer correctly. This introduces issues with the
    newly added SMP support for rk3288, resulting in rcu stalls due to
    differing timer values per core.
    
    There exist preliminary and tested patches for u-boot for this problem,
    but there are a minority of boards using other bootloaders like coreboot.
    
    There also is currently a second solution for miss-initialized architected
    timers in the works:
    - clocksource: arch_timer: Fix code to use physical timers when requested
    - clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
    
    Therefore disable smp on rk3288 again till these are finalized, also
    allowing coreboot-based boards to boot again.
    Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
    b77d4394
rk3288.dtsi 24.2 KB