• Kyle Huey's avatar
    x86/process: Correct and optimize TIF_BLOCKSTEP switch · b9894a2f
    Kyle Huey authored
    The debug control MSR is "highly magical" as the blockstep bit can be
    cleared by hardware under not well documented circumstances.
    
    So a task switch relying on the bit set by the previous task (according to
    the previous tasks thread flags) can trip over this and not update the flag
    for the next task.
    
    To fix this its required to handle DEBUGCTLMSR_BTF when either the previous
    or the next or both tasks have the TIF_BLOCKSTEP flag set.
    
    While at it avoid branching within the TIF_BLOCKSTEP case and evaluating
    boot_cpu_data twice in kernels without CONFIG_X86_DEBUGCTLMSR.
    
    x86_64: arch/x86/kernel/process.o
    text	data	bss	dec	 hex
    3024    8577    16      11617    2d61	Before
    3008	8577	16	11601	 2d51	After
    
    i386: No change
    
    [ tglx: Made the shift value explicit, use a local variable to make the
    code readable and massaged changelog]
    Originally-by: default avatarThomas Gleixner <tglx@linutronix.de>
    Signed-off-by: default avatarKyle Huey <khuey@kylehuey.com>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Andy Lutomirski <luto@kernel.org>
    Link: http://lkml.kernel.org/r/20170214081104.9244-3-khuey@kylehuey.comSigned-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
    b9894a2f
process.c 13 KB