• Ville Syrjälä's avatar
    drm/i915: Enable pipe-a power well on chv · baa4e575
    Ville Syrjälä authored
    It seems that the pipe-a power well has replaced the disp2d power well
    on chv. At least that's the case with the current punit firmware. So
    enable the pipe-a power and expand its domains to cover everything the
    disp2d well ought to cover.
    
    The other power wells (apart from the cmnlane wells) still seem awol
    in the current punit firmware. So leave them disabled in the code.
    
    This fixes a hilarious oops during resume on bsw where
    intel_hdmi_get_config() would read the port register and get back
    0xffffffff and thus think the port is enabled on pipe D. It would then
    go and index the pipe_to_crtc_mapping[] array with PIPE_D and blow up
    when intel_hdmi_get_config() tries to write to crtc->config. Someone
    really ought to replace all naked pipe_to_crtc_mapping[] uses with the
    appropriate function call so we could add a warning there if the pipe
    doesn't actually exist...
    
    We must also call the power seqeuencer state reset function from
    the pipe-a well disable just like we do from disp2d on vlv. Otherwise
    the eDP panel won't recover at resume time since the PPS has lost its
    hold on the port.
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=84903Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    baa4e575
intel_runtime_pm.c 40.3 KB