• Chris Wilson's avatar
    drm/i915/execlists: Enable coarse preemption boundaries for gen8 · bac24f59
    Chris Wilson authored
    When we introduced preemption, we chose to keep it disabled for gen8 as
    supporting preemption inside GPGPU user batches required various w/a in
    userspace. Since then, the desire to preempt long queues of requests
    between batches (e.g. within busywaiting semaphores) has grown. So allow
    arbitration within the busywaits and between requests, but disable
    arbitration within user batches so that we can preempt between requests
    and not risk breaking GPGPU.
    
    However, since this preemption is much coarser and doesn't interfere
    with userspace, we decline to include it amongst the scheduler
    capabilities. (This is also required for us to skip over the preemption
    selftests that expect to be able to preempt user batches.)
    
    Michal suggested that we could perhaps allow preemption inside gen8
    userspace batches if we can satisfy ourselves that the default
    preemption settings are viable with existing userspace (principally
    OpenCL which already should carry any known workaround). We could then
    merge the two code paths back into one, even dropping the artifical
    has-preemption device feature flag.
    
    Testcase: igt/gem_exec_scheduler/semaphore-user
    References: beecec90 ("drm/i915/execlists: Preemption!")
    Fixes: e8861964 ("drm/i915: Use HW semaphores for inter-engine synchronisation on gen8+")
    Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    Cc: Michal Winiarski <michal.winiarski@intel.com>
    Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
    Reviewed-by: Michal Winiarski <michal.winiarski@intel.com> #irc
    Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20190329134024.5254-1-chris@chris-wilson.co.uk
    bac24f59
intel_lrc.c 29 KB