• Ralf Baechle's avatar
    MIPS: Remove cpu_has_safe_index_cacheops · c00ab489
    Ralf Baechle authored
    Very early versions of the 1004K had an hardware issue that made index
    cache ops unsafe so they had to be avoided and hit ops be used instead.
    This may significantly slow down cache maintenance operations.  Only
    very early FPGA versions of the 1004K were affected so let's get rid
    of the workaround which was only implemented for the DMA cache
    maintenance operations anyway.
    Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    c00ab489
c-r4k.c 47.5 KB