• Zhi Wang's avatar
    drm/i915: Make addressing mode bits in context descriptor configurable · c01fc532
    Zhi Wang authored
    Currently the addressing mode bit in context descriptor is statically
    generated from the configuration of system-wide PPGTT usage model.
    
    GVT-g will load the PPGTT shadow page table by itself and probably one
    guest is using a different addressing mode with i915 host. The addressing
    mode bits of a LRC context should be configurable under this case.
    
    v10:
    
    - Fix the identation. (Joonas)
    
    v9:
    - Rename the data member in struct i915_gem_context. (Chris)
    
    v8:
    - Rename the data member in struct i915_gem_context. (Chris)
    
    v7:
    - Move context addressing mode bit into i915_reg.h. (Joonas/Chris)
    - Add prefix "INTEL_" for related definitions. (Joonas)
    
    v6:
    - Directly save the addressing mode bits inside i915_gem_context. (Chris)
    - Move the LRC context addressing mode bits into intel_lrc.h. (Chris)
    
    v5:
    - Change USES_FULL_48BIT(dev) to USES_FULL_48BIT(dev_priv) (Tvrtko)
    
    Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v9)
    Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
    Cc: Chris Wilson <chris@chris-wilson.co.uk>
    Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
    Signed-off-by: default avatarZhi Wang <zhi.a.wang@intel.com>
    Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    Link: http://patchwork.freedesktop.org/patch/msgid/1466078825-6662-7-git-send-email-zhi.a.wang@intel.com
    c01fc532
i915_gem_context.c 30 KB