• Alexey Kardashevskiy's avatar
    powerpc/powernv/npu: Enable NVLink pass through · b5cb9ab1
    Alexey Kardashevskiy authored
    IBM POWER8 NVlink systems come with Tesla K40-ish GPUs each of which
    also has a couple of fast speed links (NVLink). The interface to links
    is exposed as an emulated PCI bridge which is included into the same
    IOMMU group as the corresponding GPU.
    
    In the kernel, NPUs get a separate PHB of the PNV_PHB_NPU type and a PE
    which behave pretty much as the standard IODA2 PHB except NPU PHB has
    just a single TVE in the hardware which means it can have either
    32bit window or 64bit window or DMA bypass but never two of these.
    
    In order to make these links work when GPU is passed to the guest,
    these bridges need to be passed as well; otherwise performance will
    degrade.
    
    This implements and exports API to manage NPU state in regard to VFIO;
    it replicates iommu_table_group_ops.
    
    This defines a new pnv_pci_ioda2_npu_ops which is assigned to
    the IODA2 bridge if there are NPUs for a GPU on the bridge.
    The new callbacks call the default IODA2 callbacks plus new NPU API.
    This adds a gpe_table_group_to_npe() helper to find NPU PE for the IODA2
    table_group, it is not expected to fail as the helper is only called
    from the pnv_pci_ioda2_npu_ops.
    
    This does not define NPU-specific .release_ownership() so after
    VFIO is finished, DMA on NPU is disabled which is ok as the nvidia
    driver sets DMA mask when probing which enable 32 or 64bit DMA on NPU.
    
    This adds a pnv_pci_npu_setup_iommu() helper which adds NPUs to
    the GPU group if any found. The helper uses helpers to look for
    the "ibm,gpu" property in the device tree which is a phandle of
    the corresponding GPU.
    
    This adds an additional loop over PEs in pnv_ioda_setup_dma() as the main
    loop skips NPU PEs as they do not have 32bit DMA segments.
    
    As pnv_npu_set_window() and pnv_npu_unset_window() are started being used
    by the new IODA2-NPU IOMMU group, this makes the helpers public and
    adds the DMA window number parameter.
    Signed-off-by: default avatarAlexey Kardashevskiy <aik@ozlabs.ru>
    Reviewed-By: default avatarAlistair Popple <alistair@popple.id.au>
    [mpe: Add pnv_pci_ioda_setup_iommu_api() to fix build with IOMMU_API=n]
    Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
    b5cb9ab1
npu-dma.c 8.5 KB