• Janusz Krzysztofik's avatar
    ARM: OMAP1: Always reprogram dpll1 rate at boot · c116abc4
    Janusz Krzysztofik authored
    DPLL1 reprogramming to a different rate is actually blocked inside
    omap1_select_table_rate(). However, it is already forced at boot, for
    boards which boot at unusable clock rates, and this seems to work
    correctly.
    
    OTOH, we now have a fine, run time performed clock selection algorithm
    implemented, which prevents less powerfull SoCs from being overclocked
    unintentionally.
    
    Allow reprogramming of dpll1 by default, and use it for switching to the
    higest supported clock rate with all boards, including those already
    booting at a usable rate of 60 MHz or above.
    
    Created against linux-omap/master tip as of Thu Dec 1,
    commit f83c2a8cbb59981722d1ab610c79adfd034a2667. Requires the just
    submitted patch "ARM: OMAP1: Move dpll1 rates selection from config to
    runtime" to prevent from unintentional overclocking. Tested on Amstrad
    Delta.
    Signed-off-by: default avatarJanusz Krzysztofik <jkrzyszt@tis.icnet.pl>
    Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
    c116abc4
clock.c 13.4 KB