• Jiri Kosina's avatar
    drm/i915: stop using GMBUS IRQs on Gen4 chips · c12aba5a
    Jiri Kosina authored
    Commit 28c70f16 ("drm/i915: use the gmbus irq for waits") switched to
    using GMBUS irqs instead of GPIO bit-banging for chipset generations 4
    and above.
    
    It turns out though that on many systems this leads to spurious interrupts
    being generated, long after the register write to disable the IRQs has been
    issued.
    
    Typically this results in the spurious interrupt source getting
    disabled:
    
    [    9.636345] irq 16: nobody cared (try booting with the "irqpoll" option)
    [    9.637915] Pid: 4157, comm: ifup Tainted: GF            3.9.0-rc2-00341-g08637024 #422
    [    9.639484] Call Trace:
    [    9.640731]  <IRQ>  [<ffffffff8109b40d>] __report_bad_irq+0x1d/0xc7
    [    9.640731]  [<ffffffff8109b7db>] note_interrupt+0x15b/0x1e8
    [    9.640731]  [<ffffffff810999f7>] handle_irq_event_percpu+0x1bf/0x214
    [    9.640731]  [<ffffffff81099a88>] handle_irq_event+0x3c/0x5c
    [    9.640731]  [<ffffffff8109c139>] handle_fasteoi_irq+0x7a/0xb0
    [    9.640731]  [<ffffffff8100400e>] handle_irq+0x1a/0x24
    [    9.640731]  [<ffffffff81003d17>] do_IRQ+0x48/0xaf
    [    9.640731]  [<ffffffff8142f1ea>] common_interrupt+0x6a/0x6a
    [    9.640731]  <EOI>  [<ffffffff8142f952>] ? system_call_fastpath+0x16/0x1b
    [    9.640731] handlers:
    [    9.640731] [<ffffffffa000d771>] usb_hcd_irq [usbcore]
    [    9.640731] [<ffffffffa0306189>] yenta_interrupt [yenta_socket]
    [    9.640731] Disabling IRQ #16
    
    The really curious thing is now that irq 16 is _not_ the interrupt for
    the i915 driver when using MSI, but it _is_ the interrupt when not
    using MSI. So by all indications it seems like gmbus is able to
    generate a legacy (shared) interrupt in MSI mode on some
    configurations. I've tried to reproduce this and the differentiating
    thing seems to be that on unaffected systems no other device uses irq
    16 (which seems to be the non-MSI intel gfx interrupt on all gm45).
    
    I have no idea how that even can happen.
    
    To avoid tempting this elephant into a rage, just disable gmbus
    interrupt support on gen 4.
    
    v2: Improve the commit message with exact details of what's going on.
    Also add a comment in the code to warn against this particular
    elephant in the room.
    
    v3: Move the comment explaing how gen4 blows up next to the definition
    of HAS_GMBUS_IRQ to keep the code-flow straight. Suggested by Chris
    Wilson.
    
    Signed-off-by: Jiri Kosina <jkosina@suse.cz> (v1)
    Acked-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    References: https://lkml.org/lkml/2013/3/8/325Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    c12aba5a
intel_i2c.c 15.9 KB