• Archit Taneja's avatar
    omapdss: DISPC: add max pixel clock limits for LCD and TV managers · ca5ca69c
    Archit Taneja authored
    Each version of OMAP has a limitation on the maximum pixel clock frequency
    supported by an overlay manager. This limit isn't checked by omapdss. Add
    dispc feats for lcd and tv managers and check whether the target timings can
    be supported or not.
    
    The pixel clock limitations are actually more complex. They depend on which OPP
    OMAP is in, and they also depend on which encoder is the manager connected to.
    The OPP dependence is ignored as DSS forces the PM framework to be on OPP100
    when DSS is enabled, and the encoder dependencies are ignored by DISPC for now.
    These limits should come from the encoder driver.
    
    The OMAP2 TRM doesn't mention the maximum pixel clock limit. This value is left
    as half of DSS_FCLK, as OMAP2 requires the PCD to be atleast 2.
    Signed-off-by: default avatarArchit Taneja <archit@ti.com>
    Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
    ca5ca69c
dispc.c 91.4 KB