• Steve Capper's avatar
    arm64: mm: Optimise tlb flush logic where we have >4K granule · fa48e6f7
    Steve Capper authored
    The tlb maintainence functions: __cpu_flush_user_tlb_range and
    __cpu_flush_kern_tlb_range do not take into consideration the page
    granule when looping through the address range, and repeatedly flush
    tlb entries for the same page when operating with 64K pages.
    
    This patch re-works the logic s.t. we instead advance the loop by
     1 << (PAGE_SHIFT - 12), so avoid repeating ourselves.
    
    Also the routines have been converted from assembler to static inline
    functions to aid with legibility and potential compiler optimisations.
    
    The isb() has been removed from flush_tlb_kernel_range(.) as it is
    only needed when changing the execute permission of a mapping. If one
    needs to set an area of the kernel as execute/non-execute an isb()
    must be inserted after the call to flush_tlb_kernel_range.
    
    Cc: Laura Abbott <lauraa@codeaurora.org>
    Signed-off-by: default avatarSteve Capper <steve.capper@linaro.org>
    Acked-by: default avatarWill Deacon <will.deacon@arm.com>
    Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
    fa48e6f7
Makefile 195 Bytes