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Jiaxun Yang authored
It is a good clocksource which usually go as fast as CPU core and have a low access latency, so raise the base of rating from Good to desired when we know that it has a stable frequency. Increase frequency addend dividend to 10000000 (10MHz) to reasonably accommodate multi GHz level clock, also cap rating within current level. Signed-off-by:
Jiaxun Yang <jiaxun.yang@flygoat.com> Link: https://lore.kernel.org/r/20240612-mips-clks-v2-6-a57e6f49f3db@flygoat.comSigned-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org>
cc9b2c59