• Ville Syrjälä's avatar
    drm/i915: Disable MSI for all pre-gen5 · ce3f7163
    Ville Syrjälä authored
    We have pretty clear evidence that MSIs are getting lost on g4x and
    somehow the interrupt logic doesn't seem to recover from that state
    even if we try hard to clear the IIR.
    
    Disabling IER around the normal IIR clearing in the irq handler isn't
    sufficient to avoid this, so the problem really seems to be further
    up the interrupt chain. This should guarantee that there's always
    an edge if any IIR bits are set after the interrupt handler is done,
    which should normally guarantee that the CPU interrupt is generated.
    That approach seems to work perfectly on VLV/CHV, but apparently
    not on g4x.
    
    MSI is documented to be broken on 965gm at least. The chipset spec
    says MSI is defeatured because interrupts can be delayed or lost,
    which fits well with what we're seeing on g4x. Previously we've
    already disabled GMBUS interrupts on g4x because somehow GMBUS
    manages to raise legacy interrupts even when MSI is enabled.
    
    Since there's such widespread MSI breakahge all over in the pre-gen5
    land let's just give up on MSI on these platforms.
    
    Seqno reporting might be negatively affected by this since the legcy
    interrupts aren't guaranteed to be ordered with the seqno writes,
    whereas MSI interrupts may be? But an occasioanlly missed seqno
    seems like a small price to pay for generally working interrupts.
    
    Cc: stable@vger.kernel.org
    Cc: Diego Viola <diego.viola@gmail.com>
    Tested-by: default avatarDiego Viola <diego.viola@gmail.com>
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101261Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
    Link: http://patchwork.freedesktop.org/patch/msgid/20170626203051.28480-1-ville.syrjala@linux.intel.comReviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    (cherry picked from commit e38c2da0)
    Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
    ce3f7163
i915_drv.c 75.8 KB