• Leo Yan's avatar
    perf mem: Add stats for store operation with no available memory level · 98450637
    Leo Yan authored
    Sometimes we don't know memory store operations happen on exactly which
    memory (or cache) level, the memory level flag is set to PERF_MEM_LVL_NA
    in this case; a practical example is Arm SPE AUX trace sets this flag
    for all store operations due to absent info for cache level.
    
    This patch is to add a new item "st_na" in structure c2c_stats to add
    statistics for store operations with no available cache level.
    Signed-off-by: default avatarLeo Yan <leo.yan@linaro.org>
    Acked-by: default avatarJiri Olsa <jolsa@kernel.org>
    Cc: Adam Li <adamli@amperemail.onmicrosoft.com>
    Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
    Cc: Ali Saidi <alisaidi@amazon.com>
    Cc: Alyssa Ross <hi@alyssa.is>
    Cc: German Gomez <german.gomez@arm.com>
    Cc: Ian Rogers <irogers@google.com>
    Cc: Ingo Molnar <mingo@redhat.com>
    Cc: James Clark <james.clark@arm.com>
    Cc: Joe Mario <jmario@redhat.com>
    Cc: Kajol Jain <kjain@linux.ibm.com>
    Cc: Kan Liang <kan.liang@linux.intel.com>
    Cc: Li Huafei <lihuafei1@huawei.com>
    Cc: Like Xu <likexu@tencent.com>
    Cc: Mark Rutland <mark.rutland@arm.com>
    Cc: Namhyung Kim <namhyung@kernel.org>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Link: https://lore.kernel.org/r/20220518055729.1869566-2-leo.yan@linaro.orgSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
    98450637
mem-events.h 3.51 KB