• Nadav Har'El's avatar
    KVM: L1 TSC handling · d5c1785d
    Nadav Har'El authored
    KVM assumed in several places that reading the TSC MSR returns the value for
    L1. This is incorrect, because when L2 is running, the correct TSC read exit
    emulation is to return L2's value.
    
    We therefore add a new x86_ops function, read_l1_tsc, to use in places that
    specifically need to read the L1 TSC, NOT the TSC of the current level of
    guest.
    
    Note that one change, of one line in kvm_arch_vcpu_load, is made redundant
    by a different patch sent by Zachary Amsden (and not yet applied):
    kvm_arch_vcpu_load() should not read the guest TSC, and if it didn't, of
    course we didn't have to change the call of kvm_get_msr() to read_l1_tsc().
    
    [avi: moved callback to kvm_x86_ops tsc block]
    Signed-off-by: default avatarNadav Har'El <nyh@il.ibm.com>
    Acked-by: default avatarZachary Amsdem <zamsden@gmail.com>
    Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
    d5c1785d
kvm_host.h 24.9 KB