• Ard Biesheuvel's avatar
    ARM: 9201/1: spectre-bhb: rely on linker to emit cross-section literal loads · ad12c2f1
    Ard Biesheuvel authored
    The assembler does not permit 'LDR PC, <sym>' when the symbol lives in a
    different section, which is why we have been relying on rather fragile
    open-coded arithmetic to load the address of the vector_swi routine into
    the program counter using a single LDR instruction in the SWI slot in
    the vector table. The literal was moved to a different section to in
    commit 19accfd3 ("ARM: move vector stubs") to ensure that the
    vector stubs page does not need to be mapped readable for user space,
    which is the case for the vector page itself, as it carries the kuser
    helpers as well.
    
    So the cross-section literal load is open-coded, and this relies on the
    address of vector_swi to be at the very start of the vector stubs page,
    and we won't notice if we got it wrong until booting the kernel and see
    it break. Fortunately, it was guaranteed to break, so this was fragile
    but not problematic.
    
    Now that we have added two other variants of the vector table, we have 3
    occurrences of the same trick, and so the size of our ISA/compiler/CPU
    validation space has tripled, in a way that may cause regressions to only
    be observed once booting the image in question on a CPU that exercises a
    particular vector table.
    
    So let's switch to true cross section references, and let the linker fix
    them up like it fixes up all the other cross section references in the
    vector page.
    Signed-off-by: default avatarArd Biesheuvel <ardb@kernel.org>
    Signed-off-by: default avatarRussell King (Oracle) <rmk+kernel@armlinux.org.uk>
    ad12c2f1
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