Add the PLL clock controller dt-bindings for Amlogic C3 SoC family.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Co-developed-by: Chuan Liu <chuan.liu@amlogic.com>
Signed-off-by: Chuan Liu <chuan.liu@amlogic.com>
Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com>
Link: https://lore.kernel.org/r/20240522082727.3029656-2-xianwei.zhao@amlogic.comSigned-off-by: Jerome Brunet <jbrunet@baylibre.com>