• Samuel Holland's avatar
    ASoC: sun8i-codec: Set up clock tree at probe time · d8f00682
    Samuel Holland authored
    The sun8i codec is effectively an on-die variant of the X-Powers AC100
    codec. The AC100 can derive its clocks from either of two I2S master
    clocks or an internal PLL. For the on-die variant, Allwinner replaced
    the codec's own PLL with a connection to SoC's existing PLL_AUDIO, and
    they connected both I2S MCLK inputs to the same source -- which happens
    to be an integer divider from the same PLL_AUDIO.
    
    So there's actually no clocking flexibility. To run SYSCLK at the
    required rate, it must be run straight from the PLL. The only choice is
    whether it goes through AIF1CLK or AIF2CLK. Since both run at the same
    rate, the only effect of that choice is which field in SYS_SR_CTRL
    (AIF1_FS or AIF2_FS) controls the system sample rate.
    
    Since AIFnCLK is required to bring up the corresponding DAI, and AIF1
    (connected to the CPU) is used most often, let's use AIF1CLK as the
    SYSCLK parent. That means we no longer need to set AIF2_FS.
    
    Since this clock tree never changes, we can program it from the
    component probe function, instead of using DAPM widgets. The DAPM
    widgets unnecessarily change clock parents when the codec goes in/out
    of idle and the supply widgets are powered up/down.
    Signed-off-by: default avatarSamuel Holland <samuel@sholland.org>
    Acked-by: default avatarMaxime Ripard <mripard@kernel.org>
    Link: https://lore.kernel.org/r/20201001021148.15852-2-samuel@sholland.orgSigned-off-by: default avatarMark Brown <broonie@kernel.org>
    d8f00682
sun8i-codec.c 20.7 KB