• Paul Mackerras's avatar
    powerpc: Handle opposite-endian processes in emulation code · d955189a
    Paul Mackerras authored
    This adds code to the load and store emulation code to byte-swap
    the data appropriately when the process being emulated is set to
    the opposite endianness to that of the kernel.
    
    This also enables the emulation for the multiple-register loads
    and stores (lmw, stmw, lswi, stswi, lswx, stswx) to work for
    little-endian.  In little-endian mode, the partial word at the
    end of a transfer for lsw*/stsw* (when the byte count is not a
    multiple of 4) is loaded/stored at the least-significant end of
    the register.  Additionally, this fixes a bug in the previous
    code in that it could call read_mem/write_mem with a byte count
    that was not 1, 2, 4 or 8.
    
    Note that this only works correctly on processors with "true"
    little-endian mode, such as IBM POWER processors from POWER6 on, not
    the so-called "PowerPC" little-endian mode that uses address swizzling
    as implemented on the old 32-bit 603, 604, 740/750, 74xx CPUs.
    Signed-off-by: default avatarPaul Mackerras <paulus@ozlabs.org>
    Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
    d955189a
sstep.c 65.5 KB