• Marc Zyngier's avatar
    ARM: gic: allow GIC to support non-banked setups · db0d4db2
    Marc Zyngier authored
    The GIC support code is heavily using the fact that hardware
    implementations are exposing banked registers. Unfortunately, it
    looks like at least one GIC implementation (EXYNOS) offers both
    the distributor and the CPU interfaces at different addresses,
    depending on the CPU.
    
    This problem is solved by allowing the distributor and CPU interface
    addresses to be per-cpu variables for the platforms that require it.
    The EXYNOS code is updated not to mess with the GIC internals while
    handling interrupts, and struct gic_chip_data is back to being private.
    The DT binding for the gic is updated to allow an optional "cpu-offset"
    value, which is used to compute the various base addresses.
    
    Finally, a new config option (GIC_NON_BANKED) is used to control this
    feature, so the overhead is only present on kernels compiled with
    support for EXYNOS.
    
    Tested on Origen (EXYNOS4) and Panda (OMAP4).
    
    Cc: Kukjin Kim <kgene.kim@samsung.com>
    Cc: Will Deacon <will.deacon@arm.com>
    Cc: Thomas Abraham <thomas.abraham@linaro.org>
    Acked-by: default avatarRob Herring <rob.herring@calxeda.com>
    Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
    db0d4db2
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