• Matt Roper's avatar
    drm/i915/dg2: Add forcewake table · e0531636
    Matt Roper authored
    The DG2 forcewake table is very similar to the one used by XeHP SDV (and
    both platforms are even presented as a single table in the bspec).  For
    the most part DG2 starts using a few additional ranges that were
    'reserved' on XeHP SDV and stops using some others.  However there is a
    single range (0xd800-0xd87f) that needs to be handled differently
    between the two platforms (it needs GT wake on XeHP SDV, but render wake
    on DG2) so unless we want to wake both domains (which could waste power)
    or define new types of forcewake domains for this special case we need
    to have separate tables for the two platforms.  Let's define the ranges
    for both platforms with a parameterized macro so that we don't actually
    need to duplicate everything in the code.
    
    It should be fine for DG2 to re-use the Xe_HP shadow register list so we
    can continue to use the 'xehpsdv' MMIO write functions and don't need to
    spin up a separate DG2 instance.
    
    Bspec: 66534
    Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
    Signed-off-by: default avatarMatt Roper <matthew.d.roper@intel.com>
    Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20210729170008.2836648-4-matthew.d.roper@intel.com
    e0531636
intel_uncore.c 79.1 KB