• Huacai Chen's avatar
    MIPS: Add NUMA support for Loongson-3 · c4617318
    Huacai Chen authored
    Multiple Loongson-3A chips can be interconnected with HT0-bus. This is
    a CC-NUMA system that every chip (node) has its own local memory and
    cache coherency is maintained by hardware. The 64-bit physical memory
    address format is as follows:
    
    0x-0000-YZZZ-ZZZZ-ZZZZ
    
    The high 16 bits should be 0, which means the real physical address
    supported by Loongson-3 is 48-bit. The "Y" bits is the base address of
    each node, which can be also considered as the node-id. The "Z" bits is
    the address offset within a node, which means every node has a 44 bits
    address space.
    
    Macros XPHYSADDR and MAX_PHYSMEM_BITS are modified unconditionally,
    because many other MIPS CPUs have also extended their address spaces.
    Signed-off-by: default avatarHuacai Chen <chenhc@lemote.com>
    Cc: John Crispin <john@phrozen.org>
    Cc: Steven J. Hill <Steven.Hill@imgtec.com>
    Cc: Aurelien Jarno <aurelien@aurel32.net>
    Cc: linux-mips@linux-mips.org
    Cc: Fuxin Zhang <zhangfx@lemote.com>
    Cc: Zhangjin Wu <wuzhangjin@gmail.com>
    Patchwork: https://patchwork.linux-mips.org/patch/7187/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    c4617318
addrspace.h 4.12 KB