• Mika Westerberg's avatar
    PCI: Do not poll for PME if the device is in D3cold · e67c8a7e
    Mika Westerberg authored
    commit 000dd531 upstream.
    
    PME polling does not take into account that a device that is directly
    connected to the host bridge may go into D3cold as well. This leads to a
    situation where the PME poll thread reads from a config space of a
    device that is in D3cold and gets incorrect information because the
    config space is not accessible.
    
    Here is an example from Intel Ice Lake system where two PCIe root ports
    are in D3cold (I've instrumented the kernel to log the PMCSR register
    contents):
    
      [   62.971442] pcieport 0000:00:07.1: Check PME status, PMCSR=0xffff
      [   62.971504] pcieport 0000:00:07.0: Check PME status, PMCSR=0xffff
    
    Since 0xffff is interpreted so that PME is pending, the root ports will
    be runtime resumed. This repeats over and over again essentially
    blocking all runtime power management.
    
    Prevent this from happening by checking whether the device is in D3cold
    before its PME status is read.
    
    Fixes: 71a83bd7 ("PCI/PM: add runtime PM support to PCIe port")
    Signed-off-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
    Reviewed-by: default avatarLukas Wunner <lukas@wunner.de>
    Cc: 3.6+ <stable@vger.kernel.org> # v3.6+
    Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
    Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
    e67c8a7e
pci.c 166 KB