• Bjorn Helgaas's avatar
    PCI/PTM: Add pci_suspend_ptm() and pci_resume_ptm() · e8bdc5ea
    Bjorn Helgaas authored
    We disable PTM during suspend because that allows some Root Ports to enter
    lower-power PM states, which means we also need to disable PTM for all
    downstream devices.  Add pci_suspend_ptm() and pci_resume_ptm() for this
    purpose.
    
    pci_enable_ptm() and pci_disable_ptm() are for drivers to use to enable or
    disable PTM.  They use dev->ptm_enabled to keep track of whether PTM should
    be enabled.
    
    pci_suspend_ptm() and pci_resume_ptm() are PCI core-internal functions to
    temporarily disable PTM during suspend and (depending on dev->ptm_enabled)
    re-enable PTM during resume.
    
    Enable/disable/suspend/resume all use internal __pci_enable_ptm() and
    __pci_disable_ptm() functions that only update the PTM Control register.
    Outline:
    
      pci_enable_ptm(struct pci_dev *dev)
      {
         __pci_enable_ptm(dev);
         dev->ptm_enabled = 1;
         pci_ptm_info(dev);
      }
    
      pci_disable_ptm(struct pci_dev *dev)
      {
         if (dev->ptm_enabled) {
           __pci_disable_ptm(dev);
           dev->ptm_enabled = 0;
         }
      }
    
      pci_suspend_ptm(struct pci_dev *dev)
      {
         if (dev->ptm_enabled)
           __pci_disable_ptm(dev);
      }
    
      pci_resume_ptm(struct pci_dev *dev)
      {
         if (dev->ptm_enabled)
           __pci_enable_ptm(dev);
      }
    
    Nothing currently calls pci_resume_ptm(); the suspend path saves the PTM
    state before disabling PTM, so the PTM state restore in the resume path
    implicitly re-enables it.  A future change will use pci_resume_ptm() to fix
    some problems with this approach.
    
    Link: https://lore.kernel.org/r/20220909202505.314195-5-helgaas@kernel.orgTested-by: default avatarRajvi Jingar <rajvi.jingar@linux.intel.com>
    Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
    Reviewed-by: default avatarMika Westerberg <mika.westerberg@linux.intel.com>
    e8bdc5ea
pci.c 181 KB