• Sebastian Ott's avatar
    s390/pci: provide support for CPU directed interrupts · e979ce7b
    Sebastian Ott authored
    Up until now all interrupts on s390 have been floating. For MSI interrupts
    we've used a global summary bit vector (with a bit for each function) and
    a per-function interrupt bit vector (with a bit per MSI).
    
    This patch introduces a new IRQ delivery mode: CPU directed interrupts.
    In this new mode a per-CPU interrupt bit vector is used (with a bit per
    MSI per function). Further it is now possible to direct an IRQ to a
    specific CPU so we can finally support IRQ affinity.
    
    If an interrupt can't be delivered because the appointed CPU is occupied
    by a hypervisor the interrupt is delivered floating. For this a global
    summary bit vector is used (with a bit per CPU).
    Signed-off-by: default avatarSebastian Ott <sebott@linux.ibm.com>
    Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
    e979ce7b
pci_insn.c 4.5 KB