-
Jun Nie authored
Add power down bit and pll lock bit in pll config structure to ease new SoC support. Signed-off-by:
Jun Nie <jun.nie@linaro.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
e9f26231
Add power down bit and pll lock bit in pll config structure to ease new SoC support. Signed-off-by:Jun Nie <jun.nie@linaro.org> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>