• Linus Walleij's avatar
    clk: nomadik: implement the Nomadik clocks properly · ef6eb322
    Linus Walleij authored
    The Nomadik clock implementation was a stub just using
    fixed clocks.
    
    This implements the clocks properly instead of relying
    on them all being on at boot and leaving them all on.
    
    The PLLs are on the top locking to the main chrystal
    oscillator, then the HCLK for the peripherals are
    below PLL2.
    
    The gated clocks are implemented with zero cells and
    given the clock ID as a property of each node, so every
    gate need to have its own node in the device tree.
    This is because the gate registers contain both HCLK
    gates and PCLK gates, where the latter has HCLK as
    parent. As can be seen from the register layout, this
    is a complete mixup, which means all these gates need
    their own node to properly model parent/child relations
    for PCLKs apart from the HCLKs.
    
    This driver also adds a helpful debugfs file to inspect
    the hardware state of the clock gates.
    
    This is the end result in <debugfs>/clk/clk_summary
    after applying a proper device tree:
    
    ulpiclk                0   0    60000000
    mxtal                  3   3    19200000
       pll2                1   1    864000000
          clk48            3   3    48000000
             rngcclk       1   1    48000000
             usbmclk       0   0    48000000
             mshcclk       0   0    48000000
             mspclk3       0   0    48000000
             x3dclk        0   0    48000000
             skeclk        0   0    48000000
             owmclk        0   0    48000000
             mspclk2       0   0    48000000
             mspclk1       0   0    48000000
             uart2clk      0   0    48000000
             ipbmcclk      0   0    48000000
             ipi2cclk      0   0    48000000
             usbclk        0   0    48000000
             mspclk0       0   0    48000000
             uart1clk      1   2    48000000
             i2c1clk       0   0    48000000
             i2c0clk       0   0    48000000
             sdiclk        1   1    48000000
             uart0clk      0   0    48000000
             sspiclk       0   0    48000000
             irdaclk       0   0    48000000
          clk72            0   0    72000000
             difclk        0   0    72000000
             clcdclk       0   0    72000000
          clk216           0   0    216000000
             hsiclkrx      0   0    216000000
             clk108        0   0    108000000
                hsiclktx   0   0    108000000
                clk27      0   0    27000000
       pll1                1   1    264000000
          hclk             3   3    264000000
             hclkrng       1   1    264000000
             hclkusbm      0   0    264000000
             hclkcryp      0   0    264000000
             hclkhash      0   0    264000000
             hclk3d        0   0    264000000
             hclkhpi       0   0    264000000
             hclksva       0   0    264000000
             hclksaa       0   0    264000000
             hclkdif       0   0    264000000
             hclkusb       0   0    264000000
             hclkclcd      0   0    264000000
             hclkdma1      0   0    264000000
             hclksdram     0   0    264000000
             hclksmc       1   1    264000000
             hclkdma0      0   0    264000000
             pclk          7   9    264000000
                pclkmsp3   0   0    264000000
                pclkmshc   0   0    264000000
                pclkhsem   0   0    264000000
                pclkske    0   0    264000000
                pclkowm    0   0    264000000
                pclkmsp2   0   0    264000000
                pclkmsp1   0   0    264000000
                pclkuart2  0   0    264000000
                pclkxti    0   0    264000000
                pclkhsi    0   0    264000000
                pclkmsp0   0   0    264000000
                pclkuart1  1   1    264000000
                pclki2c1   0   0    264000000
                pclki2c0   0   0    264000000
                pclksdi    1   1    264000000
                pclkuart0  1   1    264000000
                pclkssp    0   0    264000000
                pclkirda   0   0    264000000
       timclk              1   1    2400000
    Acked-by: default avatarMike Turquette <mturquette@linaro.org>
    Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
    ef6eb322
st,nomadik.txt 2.29 KB