• Masahiro Yamada's avatar
    mmc: sdhci-cadence: send tune request twice to work around errata · ef6b7567
    Masahiro Yamada authored
    Cadence sent out an errata report to their customers of this IP.
    This errata is not so severe, but the tune request should be sent
    twice to avoid the potential issue.
    
    Quote from the report:
    
    Problem Summary
    ---------------
    The IP6116 SD/eMMC PHY design has a timing issue on receive data path.
    This issue may lead to an incorrect values of read/write pointers of
    the synchronization FIFO. Such a situation can happen at the SDR104
    and HS200 tuning procedure when the PHY is requested to change a phase
    of sampling clock when moving to the next tuning iteration.
    
    Workarounds
    -----------
    The following are valid workarounds to resolve the issue:
    
    1. In eMMC mode, software sends tune request twice instead of once at
       each iteration. This means that the clock phase is not changed on
       the second request so there is no potential for clock instability.
    2. In SD mode, software must not use the hardware tuning and instead
       perform an almost identical procedure to eMMC, using the HRS34 Tune
       Force register.
    Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
    ef6b7567
sdhci-cadence.c 11.8 KB