• Ido Schimmel's avatar
    mlxsw: pci: Adjust value of CPU egress traffic class · f0138e25
    Ido Schimmel authored
    During initialization, when creating the send descriptor queues (SDQs),
    we specify the CPU egress traffic class of each SDQ. The maximum number
    of classes of this type is different in the two ASICs supported by this
    PCI driver.
    
    New firmware versions check this value is set correctly, which causes
    errors on the Spectrum ASIC, as its max exposed egress traffic class is
    lower than 7.
    
    Solve this by setting this field to 3, which is an acceptable value for
    both ASICs.
    
    Note that we currently do not expose the QoS capabilities of the ASICs,
    so setting this to an hardcoded value is OK for now.
    Signed-off-by: default avatarIdo Schimmel <idosch@mellanox.com>
    Signed-off-by: default avatarJiri Pirko <jiri@mellanox.com>
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    f0138e25
pci.c 50 KB