• Horia Geant?'s avatar
    crypto: caam - fix snooping for write transactions · f1096749
    Horia Geant? authored
    HW coherency won't work properly for CAAM write transactions
    if AWCACHE is left to default (POR) value - 4'b0001.
    It has to be programmed to 4'b0010, i.e. AXI3 Cacheable bit set.
    
    For platforms that have HW coherency support:
    -PPC-based: the update has no effect; CAAM coherency already works
    due to the IOMMU (PAMU) driver setting the correct memory coherency
    attributes
    -ARM-based: the update fixes cache coherency issues,
    since IOMMU (SMMU) driver is not programmed to behave similar to PAMU
    Signed-off-by: default avatarHoria Geant? <horia.geanta@freescale.com>
    Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
    f1096749
ctrl.c 20.8 KB