• Linus Torvalds's avatar
    Merge branch 'x86-timers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip · f7dd3b17
    Linus Torvalds authored
    Pull timer updates from Thomas Gleixner:
     "This is the last functional update from the tip tree for 4.10. It got
      delayed due to a newly reported and anlyzed variant of BIOS bug and
      the resulting wreckage:
    
       - Seperation of TSC being marked realiable and the fact that the
         platform provides the TSC frequency via CPUID/MSRs and making use
         for it for GOLDMONT.
    
       - TSC adjust MSR validation and sanitizing:
    
         The TSC adjust MSR contains the offset to the hardware counter. The
         sum of the adjust MSR and the counter is the TSC value which is
         read via RDTSC.
    
         On at least two machines from different vendors the BIOS sets the
         TSC adjust MSR to negative values. This happens on cold and warm
         boot. While on cold boot the offset is a few milliseconds, on warm
         boot it basically compensates the power on time of the system. The
         BIOSes are not even using the adjust MSR to set all CPUs in the
         package to the same offset. The offsets are different which renders
         the TSC unusable,
    
         What's worse is that the TSC deadline timer has a HW feature^Wbug.
         It malfunctions when the TSC adjust value is negative or greater
         equal 0x80000000 resulting in silent boot failures, hard lockups or
         non firing timers. This looks like some hardware internal 32/64bit
         issue with a sign extension problem. Intel has been silent so far
         on the issue.
    
         The update contains sanity checks and keeps the adjust register
         within working limits and in sync on the package.
    
         As it looks like this disease is spreading via BIOS crapware, we
         need to address this urgently as the boot failures are hard to
         debug for users"
    
    * 'x86-timers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
      x86/tsc: Limit the adjust value further
      x86/tsc: Annotate printouts as firmware bug
      x86/tsc: Force TSC_ADJUST register to value >= zero
      x86/tsc: Validate TSC_ADJUST after resume
      x86/tsc: Validate cpumask pointer before accessing it
      x86/tsc: Fix broken CONFIG_X86_TSC=n build
      x86/tsc: Try to adjust TSC if sync test fails
      x86/tsc: Prepare warp test for TSC adjustment
      x86/tsc: Move sync cleanup to a safe place
      x86/tsc: Sync test only for the first cpu in a package
      x86/tsc: Verify TSC_ADJUST from idle
      x86/tsc: Store and check TSC ADJUST MSR
      x86/tsc: Detect random warps
      x86/tsc: Use X86_FEATURE_TSC_ADJUST in detect_art()
      x86/tsc: Finalize the split of the TSC_RELIABLE flag
      x86/tsc: Set TSC_KNOWN_FREQ and TSC_RELIABLE flags on Intel Atom SoCs
      x86/tsc: Mark Intel ATOM_GOLDMONT TSC reliable
      x86/tsc: Mark TSC frequency determined by CPUID as known
      x86/tsc: Add X86_FEATURE_TSC_KNOWN_FREQ flag
    f7dd3b17
cpufeatures.h 18.1 KB