• Troy Kisky's avatar
    ARM: dts: imx: pinfunc: add MX6QDL_PAD_GPIO_6__ENET_IRQ · d8c765e0
    Troy Kisky authored
    From "Chip Errata for the i.MX 6Dual/6Quad"
    
    ERR006687 ENET: Only the ENET wake-up interrupt request can wake the
    system from Wait mode.
    
    The ENET block generates many interrupts. Only one of these interrupt lines
    is connected to the General Power Controller (GPC) block, but a logical OR
    of all of the ENET interrupts is connected to the General Interrupt Controller
    (GIC). When the system enters Wait mode, a normal RX Done or TX Done does not
    wake up the system because the GPC cannot see this interrupt. This impacts
    performance of the ENET block because its interrupts are serviced only when
    the chip exits Wait mode due to an interrupt from some other wake-up source.
    
    Adding MX6QDL_PAD_GPIO_6__ENET_IRQ is the 1st step to
    workaround this problem.
    
    The input reg is set to 0x3c to set IOMUX_OBSRV_MUX1 to ENET_IRQ.
    The mux reg value is 0x11, so that the observable mux is routed to
    this pin and to the gpio controller(sion bit). These magic values
    come from Ranjani Vaidyanathan's patch:
    "ENGR00257847-1 MX6Q/DL-Fix Ethernet performance issue when WAIT mode is active"
    Signed-off-by: default avatarTroy Kisky <troy.kisky@boundarydevices.com>
    CC: Ranjani Vaidyanathan <ra5478@freescale.com>
    Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
    d8c765e0
imx6q-pinfunc.h 78.8 KB