• Archit Taneja's avatar
    dmaengine: qcom_bam_dma: Generalize BAM register offset calculations · fb93f520
    Archit Taneja authored
    The BAM DMA IP comes in different versions. The register offset layout varies
    among these versions. The layouts depend on which generation/family of SoCs they
    belong to.
    
    The current SoCs(like 8084, 8074) have a layout where the Top level registers
    come in the beginning of the address range, followed by pipe and event
    registers. The BAM revision numbers fall above 1.4.0.
    
    The older SoCs (like 8064, 8960) have a layout where the pipe registers come
    first, and the top level come later. These have BAM revision numbers lesser than
    1.4.0.
    
    It isn't suitable to have macros provide the register offsets with the layouts
    changed. Future BAM revisions may have different register layouts too. The
    register addresses are now calculated by referring a table which contains a base
    offset and multipliers for pipe/evnt/ee registers.
    
    We have a common function bam_addr() which computes addresses for all the
    registers. When computing address of top level/ee registers, we pass 0 to the
    pipe argument in addr() since they don't have any multiple instances.
    
    Some of the unused register definitions are removed. We can add new registers as
    we need them.
    Reviewed-by: default avatarKumar Gala <galak@codeaurora.org>
    Reviewed-by: default avatarAndy Gross <agross@codeaurora.org>
    Signed-off-by: default avatarArchit Taneja <architt@codeaurora.org>
    Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
    fb93f520
qcom_bam_dma.c 30.1 KB