Commit 005c82d6 authored by Len Brown's avatar Len Brown

tools/power turbostat: Support Knights Mill (KNM)

Original-author: Piotr Luc <piotr.luc@intel.com>
Signed-off-by: default avatarLen Brown <len.brown@intel.com>
parent ddadb8ad
...@@ -2202,6 +2202,7 @@ int probe_nhm_msrs(unsigned int family, unsigned int model) ...@@ -2202,6 +2202,7 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
pkg_cstate_limits = amt_pkg_cstate_limits; pkg_cstate_limits = amt_pkg_cstate_limits;
break; break;
case INTEL_FAM6_XEON_PHI_KNL: /* PHI */ case INTEL_FAM6_XEON_PHI_KNL: /* PHI */
case INTEL_FAM6_XEON_PHI_KNM:
pkg_cstate_limits = phi_pkg_cstate_limits; pkg_cstate_limits = phi_pkg_cstate_limits;
break; break;
case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */ case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
...@@ -2228,6 +2229,7 @@ int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model) ...@@ -2228,6 +2229,7 @@ int has_nhm_turbo_ratio_limit(unsigned int family, unsigned int model)
case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */ case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */ case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */
case INTEL_FAM6_XEON_PHI_KNL: /* PHI - Knights Landing (different MSR definition) */ case INTEL_FAM6_XEON_PHI_KNL: /* PHI - Knights Landing (different MSR definition) */
case INTEL_FAM6_XEON_PHI_KNM:
return 0; return 0;
default: default:
return 1; return 1;
...@@ -2275,6 +2277,7 @@ int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model) ...@@ -2275,6 +2277,7 @@ int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
switch (model) { switch (model) {
case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */ case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
case INTEL_FAM6_XEON_PHI_KNM:
return 1; return 1;
default: default:
return 0; return 0;
...@@ -2305,6 +2308,7 @@ int has_config_tdp(unsigned int family, unsigned int model) ...@@ -2305,6 +2308,7 @@ int has_config_tdp(unsigned int family, unsigned int model)
case INTEL_FAM6_SKYLAKE_X: /* SKX */ case INTEL_FAM6_SKYLAKE_X: /* SKX */
case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */ case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
case INTEL_FAM6_XEON_PHI_KNM:
return 1; return 1;
default: default:
return 0; return 0;
...@@ -2606,6 +2610,7 @@ rapl_dram_energy_units_probe(int model, double rapl_energy_units) ...@@ -2606,6 +2610,7 @@ rapl_dram_energy_units_probe(int model, double rapl_energy_units)
case INTEL_FAM6_BROADWELL_X: /* BDX */ case INTEL_FAM6_BROADWELL_X: /* BDX */
case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */ case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
case INTEL_FAM6_XEON_PHI_KNM:
return (rapl_dram_energy_units = 15.3 / 1000000); return (rapl_dram_energy_units = 15.3 / 1000000);
default: default:
return (rapl_energy_units); return (rapl_energy_units);
...@@ -2654,6 +2659,7 @@ void rapl_probe(unsigned int family, unsigned int model) ...@@ -2654,6 +2659,7 @@ void rapl_probe(unsigned int family, unsigned int model)
case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */ case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
case INTEL_FAM6_SKYLAKE_X: /* SKX */ case INTEL_FAM6_SKYLAKE_X: /* SKX */
case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
case INTEL_FAM6_XEON_PHI_KNM:
do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO; do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
break; break;
case INTEL_FAM6_SANDYBRIDGE_X: case INTEL_FAM6_SANDYBRIDGE_X:
...@@ -3017,6 +3023,7 @@ int is_knl(unsigned int family, unsigned int model) ...@@ -3017,6 +3023,7 @@ int is_knl(unsigned int family, unsigned int model)
return 0; return 0;
switch (model) { switch (model) {
case INTEL_FAM6_XEON_PHI_KNL: /* KNL */ case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
case INTEL_FAM6_XEON_PHI_KNM:
return 1; return 1;
} }
return 0; return 0;
......
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