Commit 00d5d22a authored by Dave Thaler's avatar Dave Thaler Committed by Alexei Starovoitov

bpf, docs: Editorial nits in instruction-set.rst

This patch addresses a number of editorial nits including
spelling, punctuation, grammar, and wording consistency issues
in instruction-set.rst.
Signed-off-by: default avatarDave Thaler <dthaler1968@gmail.com>
Acked-by: default avatarDavid Vernet <void@manifault.com>
Link: https://lore.kernel.org/r/20240405155245.3618-1-dthaler1968@gmail.comSigned-off-by: default avatarAlexei Starovoitov <ast@kernel.org>
parent ba0cbe2b
...@@ -43,7 +43,7 @@ a type's signedness (`S`) and bit width (`N`), respectively. ...@@ -43,7 +43,7 @@ a type's signedness (`S`) and bit width (`N`), respectively.
===== ========= ===== =========
For example, `u32` is a type whose valid values are all the 32-bit unsigned For example, `u32` is a type whose valid values are all the 32-bit unsigned
numbers and `s16` is a types whose valid values are all the 16-bit signed numbers and `s16` is a type whose valid values are all the 16-bit signed
numbers. numbers.
Functions Functions
...@@ -108,7 +108,7 @@ conformance group means it must support all instructions in that conformance ...@@ -108,7 +108,7 @@ conformance group means it must support all instructions in that conformance
group. group.
The use of named conformance groups enables interoperability between a runtime The use of named conformance groups enables interoperability between a runtime
that executes instructions, and tools as such compilers that generate that executes instructions, and tools such as compilers that generate
instructions for the runtime. Thus, capability discovery in terms of instructions for the runtime. Thus, capability discovery in terms of
conformance groups might be done manually by users or automatically by tools. conformance groups might be done manually by users or automatically by tools.
...@@ -181,10 +181,13 @@ A basic instruction is encoded as follows:: ...@@ -181,10 +181,13 @@ A basic instruction is encoded as follows::
(`64-bit immediate instructions`_ reuse this field for other purposes) (`64-bit immediate instructions`_ reuse this field for other purposes)
**dst_reg** **dst_reg**
destination register number (0-10) destination register number (0-10), unless otherwise specified
(future instructions might reuse this field for other purposes)
**offset** **offset**
signed integer offset used with pointer arithmetic signed integer offset used with pointer arithmetic, except where
otherwise specified (some arithmetic instructions reuse this field
for other purposes)
**imm** **imm**
signed integer immediate value signed integer immediate value
...@@ -228,10 +231,12 @@ This is depicted in the following figure:: ...@@ -228,10 +231,12 @@ This is depicted in the following figure::
operation to perform, encoded as explained above operation to perform, encoded as explained above
**regs** **regs**
The source and destination register numbers, encoded as explained above The source and destination register numbers (unless otherwise
specified), encoded as explained above
**offset** **offset**
signed integer offset used with pointer arithmetic signed integer offset used with pointer arithmetic, unless
otherwise specified
**imm** **imm**
signed integer immediate value signed integer immediate value
...@@ -342,8 +347,8 @@ where '(u32)' indicates that the upper 32 bits are zeroed. ...@@ -342,8 +347,8 @@ where '(u32)' indicates that the upper 32 bits are zeroed.
dst = dst ^ imm dst = dst ^ imm
Note that most instructions have instruction offset of 0. Only three instructions Note that most arithmetic instructions have 'offset' set to 0. Only three instructions
(``SDIV``, ``SMOD``, ``MOVSX``) have a non-zero offset. (``SDIV``, ``SMOD``, ``MOVSX``) have a non-zero 'offset'.
Division, multiplication, and modulo operations for ``ALU`` are part Division, multiplication, and modulo operations for ``ALU`` are part
of the "divmul32" conformance group, and division, multiplication, and of the "divmul32" conformance group, and division, multiplication, and
...@@ -370,10 +375,10 @@ etc. This specification requires that signed modulo use truncated division ...@@ -370,10 +375,10 @@ etc. This specification requires that signed modulo use truncated division
a % n = a - n * trunc(a / n) a % n = a - n * trunc(a / n)
The ``MOVSX`` instruction does a move operation with sign extension. The ``MOVSX`` instruction does a move operation with sign extension.
``{MOVSX, X, ALU}`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into 32 ``{MOVSX, X, ALU}`` :term:`sign extends<Sign Extend>` 8-bit and 16-bit operands into
bit operands, and zeroes the remaining upper 32 bits. 32-bit operands, and zeroes the remaining upper 32 bits.
``{MOVSX, X, ALU64}`` :term:`sign extends<Sign Extend>` 8-bit, 16-bit, and 32-bit ``{MOVSX, X, ALU64}`` :term:`sign extends<Sign Extend>` 8-bit, 16-bit, and 32-bit
operands into 64 bit operands. Unlike other arithmetic instructions, operands into 64-bit operands. Unlike other arithmetic instructions,
``MOVSX`` is only defined for register source operands (``X``). ``MOVSX`` is only defined for register source operands (``X``).
The ``NEG`` instruction is only defined when the source bit is clear The ``NEG`` instruction is only defined when the source bit is clear
...@@ -411,19 +416,19 @@ conformance group. ...@@ -411,19 +416,19 @@ conformance group.
Examples: Examples:
``{END, TO_LE, ALU}`` with imm = 16/32/64 means:: ``{END, TO_LE, ALU}`` with 'imm' = 16/32/64 means::
dst = htole16(dst) dst = htole16(dst)
dst = htole32(dst) dst = htole32(dst)
dst = htole64(dst) dst = htole64(dst)
``{END, TO_BE, ALU}`` with imm = 16/32/64 means:: ``{END, TO_BE, ALU}`` with 'imm' = 16/32/64 means::
dst = htobe16(dst) dst = htobe16(dst)
dst = htobe32(dst) dst = htobe32(dst)
dst = htobe64(dst) dst = htobe64(dst)
``{END, TO_LE, ALU64}`` with imm = 16/32/64 means:: ``{END, TO_LE, ALU64}`` with 'imm' = 16/32/64 means::
dst = bswap16(dst) dst = bswap16(dst)
dst = bswap32(dst) dst = bswap32(dst)
...@@ -475,7 +480,7 @@ where 's>=' indicates a signed '>=' comparison. ...@@ -475,7 +480,7 @@ where 's>=' indicates a signed '>=' comparison.
gotol +imm gotol +imm
where 'imm' means the branch offset comes from insn 'imm' field. where 'imm' means the branch offset comes from the 'imm' field.
Note that there are two flavors of ``JA`` instructions. The Note that there are two flavors of ``JA`` instructions. The
``JMP`` class permits a 16-bit jump offset specified by the 'offset' ``JMP`` class permits a 16-bit jump offset specified by the 'offset'
...@@ -494,25 +499,25 @@ Helper functions are a concept whereby BPF programs can call into a ...@@ -494,25 +499,25 @@ Helper functions are a concept whereby BPF programs can call into a
set of function calls exposed by the underlying platform. set of function calls exposed by the underlying platform.
Historically, each helper function was identified by an address Historically, each helper function was identified by an address
encoded in the imm field. The available helper functions may differ encoded in the 'imm' field. The available helper functions may differ
for each program type, but address values are unique across all program types. for each program type, but address values are unique across all program types.
Platforms that support the BPF Type Format (BTF) support identifying Platforms that support the BPF Type Format (BTF) support identifying
a helper function by a BTF ID encoded in the imm field, where the BTF ID a helper function by a BTF ID encoded in the 'imm' field, where the BTF ID
identifies the helper name and type. identifies the helper name and type.
Program-local functions Program-local functions
~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~
Program-local functions are functions exposed by the same BPF program as the Program-local functions are functions exposed by the same BPF program as the
caller, and are referenced by offset from the call instruction, similar to caller, and are referenced by offset from the call instruction, similar to
``JA``. The offset is encoded in the imm field of the call instruction. ``JA``. The offset is encoded in the 'imm' field of the call instruction.
A ``EXIT`` within the program-local function will return to the caller. An ``EXIT`` within the program-local function will return to the caller.
Load and store instructions Load and store instructions
=========================== ===========================
For load and store instructions (``LD``, ``LDX``, ``ST``, and ``STX``), the For load and store instructions (``LD``, ``LDX``, ``ST``, and ``STX``), the
8-bit 'opcode' field is divided as:: 8-bit 'opcode' field is divided as follows::
+-+-+-+-+-+-+-+-+ +-+-+-+-+-+-+-+-+
|mode |sz |class| |mode |sz |class|
...@@ -580,7 +585,7 @@ instructions that transfer data between a register and memory. ...@@ -580,7 +585,7 @@ instructions that transfer data between a register and memory.
dst = *(signed size *) (src + offset) dst = *(signed size *) (src + offset)
Where size is one of: ``B``, ``H``, or ``W``, and Where '<size>' is one of: ``B``, ``H``, or ``W``, and
'signed size' is one of: s8, s16, or s32. 'signed size' is one of: s8, s16, or s32.
Atomic operations Atomic operations
......
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