Commit 00f50c66 authored by Ben Skeggs's avatar Ben Skeggs

drm/nouveau/gr/gm107-: fix touching non-existent ppcs in attrib cb setup

Also removes an XXX; according to nvgpu headers the field is called
NV_PGRAPH_GPCS_SWDX_TC_BETA_CB_SIZE_DIV3, so, apparently not some
magic we need to figure out :)
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent a00ecf22
...@@ -920,13 +920,15 @@ gm107_grctx_generate_attrib(struct gf100_grctx *info) ...@@ -920,13 +920,15 @@ gm107_grctx_generate_attrib(struct gf100_grctx *info)
const u32 bs = attrib * gr->ppc_tpc_nr[gpc][ppc]; const u32 bs = attrib * gr->ppc_tpc_nr[gpc][ppc];
const u32 u = 0x418ea0 + (n * 0x04); const u32 u = 0x418ea0 + (n * 0x04);
const u32 o = PPC_UNIT(gpc, ppc, 0); const u32 o = PPC_UNIT(gpc, ppc, 0);
if (!(gr->ppc_mask[gpc] & (1 << ppc)))
continue;
mmio_wr32(info, o + 0xc0, bs); mmio_wr32(info, o + 0xc0, bs);
mmio_wr32(info, o + 0xf4, bo); mmio_wr32(info, o + 0xf4, bo);
bo += grctx->attrib_nr_max * gr->ppc_tpc_nr[gpc][ppc]; bo += grctx->attrib_nr_max * gr->ppc_tpc_nr[gpc][ppc];
mmio_wr32(info, o + 0xe4, as); mmio_wr32(info, o + 0xe4, as);
mmio_wr32(info, o + 0xf8, ao); mmio_wr32(info, o + 0xf8, ao);
ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc];
mmio_wr32(info, u, ((bs / 3 /*XXX*/) << 16) | bs); mmio_wr32(info, u, ((bs / 3) << 16) | bs);
} }
} }
} }
......
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