Commit 0174df4e authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher

drm/amdgpu: refine function name for consistency

Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6f0359ff
...@@ -696,7 +696,7 @@ static int vce_v3_0_process_interrupt(struct amdgpu_device *adev, ...@@ -696,7 +696,7 @@ static int vce_v3_0_process_interrupt(struct amdgpu_device *adev,
return 0; return 0;
} }
static void vce_v3_set_bypass_mode(struct amdgpu_device *adev, bool enable) static void vce_v3_0_set_bypass_mode(struct amdgpu_device *adev, bool enable)
{ {
u32 tmp = RREG32_SMC(ixGCK_DFS_BYPASS_CNTL); u32 tmp = RREG32_SMC(ixGCK_DFS_BYPASS_CNTL);
...@@ -716,7 +716,7 @@ static int vce_v3_0_set_clockgating_state(void *handle, ...@@ -716,7 +716,7 @@ static int vce_v3_0_set_clockgating_state(void *handle,
int i; int i;
if (adev->asic_type == CHIP_POLARIS10) if (adev->asic_type == CHIP_POLARIS10)
vce_v3_set_bypass_mode(adev, enable); vce_v3_0_set_bypass_mode(adev, enable);
if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG)) if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG))
return 0; return 0;
......
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