Commit 01c65733 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'mvebu-dt-6.1-1' of...

Merge tag 'mvebu-dt-6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt

mvebu dt for 6.1 (part 1)

Add definitions for PCIe legacy INTx interrupts for dts using
pci-mvebu.c controller driver.

Add gpio-ranges for pin muxing for Armada 38x

Add audio support for Armada 38x

Turris-omnia (Armada 385 based) fix a pin name

lsxl (kirkwood based)
 - Fix fix serial line
 - Remove first ethernet port

* tag 'mvebu-dt-6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: (22 commits)
  ARM: dts: turris-omnia: Add label for wan port
  ARM: dts: turris-omnia: Define S/PDIF audio card
  ARM: mvebu: Add spdif-pins mpp pins for Armada 38x
  ARM: mvebu: add audio support to Armada 385 DB
  ARM: mvebu: add audio I2S controller to Armada 38x Device Tree
  ARM: dts: armada-38x: Add gpio-ranges for pin muxing
  ARM: dts: dove: Add definitions for PCIe error interrupts
  ARM: dts: kirkwood: Add definitions for PCIe error interrupts
  ARM: dts: armada-39x.dtsi: Add definitions for PCIe legacy INTx interrupts
  ARM: dts: armada-380.dtsi: Add definitions for PCIe legacy INTx interrupts
  ARM: dts: armada-375.dtsi: Add definitions for PCIe legacy INTx interrupts
  ARM: dts: armada-xp-mv78460.dtsi: Add definitions for PCIe legacy INTx interrupts
  ARM: dts: armada-xp-mv78260.dtsi: Add definitions for PCIe legacy INTx interrupts
  ARM: dts: armada-xp-mv78230.dtsi: Add definitions for PCIe legacy INTx interrupts
  ARM: dts: armada-xp-98dx3236.dtsi: Add definitions for PCIe legacy INTx interrupts
  ARM: dts: armada-370.dtsi: Add definitions for PCIe legacy INTx interrupts
  ARM: dts: dove: Add definitions for PCIe legacy INTx interrupts
  ARM: dts: kirkwood: Add definitions for PCIe legacy INTx interrupts
  ARM: dts: kirkwood: lsxl: remove first ethernet port
  ARM: dts: kirkwood: lsxl: fix serial line
  ...

Link: https://lore.kernel.org/r/87edw2xfle.fsf@BL-laptopSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 79a90599 649acf24
...@@ -60,16 +60,26 @@ pcie0: pcie@1,0 { ...@@ -60,16 +60,26 @@ pcie0: pcie@1,0 {
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 58>; interrupt-map = <0 0 0 1 &pcie0_intc 0>,
<0 0 0 2 &pcie0_intc 1>,
<0 0 0 3 &pcie0_intc 2>,
<0 0 0 4 &pcie0_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 5>; clocks = <&gateclk 5>;
status = "disabled"; status = "disabled";
pcie0_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie2: pcie@2,0 { pcie2: pcie@2,0 {
...@@ -78,16 +88,26 @@ pcie2: pcie@2,0 { ...@@ -78,16 +88,26 @@ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 62>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>; 0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 62>; interrupt-map = <0 0 0 1 &pcie2_intc 0>,
<0 0 0 2 &pcie2_intc 1>,
<0 0 0 3 &pcie2_intc 2>,
<0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 9>; clocks = <&gateclk 9>;
status = "disabled"; status = "disabled";
pcie2_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
......
...@@ -568,16 +568,26 @@ pcie0: pcie@1,0 { ...@@ -568,16 +568,26 @@ pcie0: pcie@1,0 {
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; interrupt-map = <0 0 0 1 &pcie0_intc 0>,
<0 0 0 2 &pcie0_intc 1>,
<0 0 0 3 &pcie0_intc 2>,
<0 0 0 4 &pcie0_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 5>; clocks = <&gateclk 5>;
status = "disabled"; status = "disabled";
pcie0_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie1: pcie@2,0 { pcie1: pcie@2,0 {
...@@ -586,16 +596,26 @@ pcie1: pcie@2,0 { ...@@ -586,16 +596,26 @@ pcie1: pcie@2,0 {
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>; 0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <1>; marvell,pcie-lane = <1>;
clocks = <&gateclk 6>; clocks = <&gateclk 6>;
status = "disabled"; status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
......
...@@ -64,16 +64,26 @@ pcie@1,0 { ...@@ -64,16 +64,26 @@ pcie@1,0 {
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 8>; clocks = <&gateclk 8>;
status = "disabled"; status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
/* x1 port */ /* x1 port */
...@@ -83,16 +93,26 @@ pcie@2,0 { ...@@ -83,16 +93,26 @@ pcie@2,0 {
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>; 0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; interrupt-map = <0 0 0 1 &pcie2_intc 0>,
<0 0 0 2 &pcie2_intc 1>,
<0 0 0 3 &pcie2_intc 2>,
<0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 5>; clocks = <&gateclk 5>;
status = "disabled"; status = "disabled";
pcie2_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
/* x1 port */ /* x1 port */
...@@ -102,16 +122,26 @@ pcie@3,0 { ...@@ -102,16 +122,26 @@ pcie@3,0 {
reg = <0x1800 0 0 0 0>; reg = <0x1800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>; 0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; interrupt-map = <0 0 0 1 &pcie3_intc 0>,
<0 0 0 2 &pcie3_intc 1>,
<0 0 0 3 &pcie3_intc 2>,
<0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <2>; marvell,pcie-port = <2>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 6>; clocks = <&gateclk 6>;
status = "disabled"; status = "disabled";
pcie3_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
}; };
......
...@@ -105,6 +105,33 @@ sfp: sfp { ...@@ -105,6 +105,33 @@ sfp: sfp {
*/ */
status = "disabled"; status = "disabled";
}; };
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "SPDIF";
simple-audio-card,format = "i2s";
simple-audio-card,cpu {
sound-dai = <&audio_controller 1>;
};
simple-audio-card,codec {
sound-dai = <&spdif_out>;
};
};
spdif_out: spdif-out {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
};
};
&audio_controller {
/* Pin header U16, GPIO51 in SPDIFO mode */
pinctrl-0 = <&spdif_pins>;
pinctrl-names = "default";
spdif-mode;
status = "okay";
}; };
&bm { &bm {
...@@ -166,6 +193,7 @@ &eth2 { ...@@ -166,6 +193,7 @@ &eth2 {
buffer-manager = <&bm>; buffer-manager = <&bm>;
bm,pool-long = <2>; bm,pool-long = <2>;
bm,pool-short = <3>; bm,pool-short = <3>;
label = "wan";
}; };
&i2c0 { &i2c0 {
...@@ -476,7 +504,7 @@ spi0cs0_pins: spi0cs0-pins { ...@@ -476,7 +504,7 @@ spi0cs0_pins: spi0cs0-pins {
marvell,function = "spi0"; marvell,function = "spi0";
}; };
spi0cs1_pins: spi0cs1-pins { spi0cs2_pins: spi0cs2-pins {
marvell,pins = "mpp26"; marvell,pins = "mpp26";
marvell,function = "spi0"; marvell,function = "spi0";
}; };
...@@ -511,7 +539,7 @@ partition@100000 { ...@@ -511,7 +539,7 @@ partition@100000 {
}; };
}; };
/* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */ /* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
}; };
&uart0 { &uart0 {
......
...@@ -36,6 +36,11 @@ internal-regs { ...@@ -36,6 +36,11 @@ internal-regs {
i2c@11000 { i2c@11000 {
status = "okay"; status = "okay";
clock-frequency = <100000>; clock-frequency = <100000>;
audio_codec: audio-codec@4a {
#sound-dai-cells = <0>;
compatible = "cirrus,cs42l51";
reg = <0x4a>;
};
}; };
i2c@11100 { i2c@11100 {
...@@ -99,6 +104,12 @@ sdhci@d8000 { ...@@ -99,6 +104,12 @@ sdhci@d8000 {
no-1-8-v; no-1-8-v;
}; };
audio-controller@e8000 {
pinctrl-0 = <&i2s_pins>;
pinctrl-names = "default";
status = "disabled";
};
usb3@f0000 { usb3@f0000 {
status = "okay"; status = "okay";
}; };
...@@ -128,6 +139,64 @@ pcie@2,0 { ...@@ -128,6 +139,64 @@ pcie@2,0 {
}; };
}; };
}; };
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "Armada 385 DB Audio";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,widgets =
"Headphone", "Out Jack",
"Line", "In Jack";
simple-audio-card,routing =
"Out Jack", "HPL",
"Out Jack", "HPR",
"AIN1L", "In Jack",
"AIN1R", "In Jack";
status = "disabled";
simple-audio-card,dai-link@0 {
format = "i2s";
cpu {
sound-dai = <&audio_controller 0>;
};
codec {
sound-dai = <&audio_codec>;
};
};
simple-audio-card,dai-link@1 {
format = "i2s";
cpu {
sound-dai = <&audio_controller 1>;
};
codec {
sound-dai = <&spdif_out>;
};
};
simple-audio-card,dai-link@2 {
format = "i2s";
cpu {
sound-dai = <&audio_controller 1>;
};
codec {
sound-dai = <&spdif_in>;
};
};
};
spdif_out: spdif-out {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
};
spdif_in: spdif-in {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dir";
};
}; };
&spi0 { &spi0 {
......
...@@ -289,6 +289,18 @@ sata3_pins: sata-pins-3 { ...@@ -289,6 +289,18 @@ sata3_pins: sata-pins-3 {
marvell,pins = "mpp44"; marvell,pins = "mpp44";
marvell,function = "sata3"; marvell,function = "sata3";
}; };
i2s_pins: i2s-pins {
marvell,pins = "mpp48", "mpp49",
"mpp50", "mpp51",
"mpp52", "mpp53";
marvell,function = "audio";
};
spdif_pins: spdif-pins {
marvell,pins = "mpp51";
marvell,function = "audio";
};
}; };
gpio0: gpio@18100 { gpio0: gpio@18100 {
...@@ -298,6 +310,7 @@ gpio0: gpio@18100 { ...@@ -298,6 +310,7 @@ gpio0: gpio@18100 {
reg-names = "gpio", "pwm"; reg-names = "gpio", "pwm";
ngpios = <32>; ngpios = <32>;
gpio-controller; gpio-controller;
gpio-ranges = <&pinctrl 0 0 32>;
#gpio-cells = <2>; #gpio-cells = <2>;
#pwm-cells = <2>; #pwm-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -316,6 +329,7 @@ gpio1: gpio@18140 { ...@@ -316,6 +329,7 @@ gpio1: gpio@18140 {
reg-names = "gpio", "pwm"; reg-names = "gpio", "pwm";
ngpios = <28>; ngpios = <28>;
gpio-controller; gpio-controller;
gpio-ranges = <&pinctrl 0 32 28>;
#gpio-cells = <2>; #gpio-cells = <2>;
#pwm-cells = <2>; #pwm-cells = <2>;
interrupt-controller; interrupt-controller;
...@@ -618,6 +632,18 @@ sdhci: sdhci@d8000 { ...@@ -618,6 +632,18 @@ sdhci: sdhci@d8000 {
status = "disabled"; status = "disabled";
}; };
audio_controller: audio-controller@e8000 {
#sound-dai-cells = <1>;
compatible = "marvell,armada-380-audio";
reg = <0xe8000 0x4000>, <0x18410 0xc>,
<0x18204 0x4>;
reg-names = "i2s_regs", "pll_regs", "soc_ctrl";
interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gateclk 0>;
clock-names = "internal";
status = "disabled";
};
usb3_0: usb3@f0000 { usb3_0: usb3@f0000 {
compatible = "marvell,armada-380-xhci"; compatible = "marvell,armada-380-xhci";
reg = <0xf0000 0x4000>,<0xf4000 0x4000>; reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
......
...@@ -438,16 +438,26 @@ pcie@1,0 { ...@@ -438,16 +438,26 @@ pcie@1,0 {
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 8>; clocks = <&gateclk 8>;
status = "disabled"; status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
/* x1 port */ /* x1 port */
...@@ -457,16 +467,26 @@ pcie@2,0 { ...@@ -457,16 +467,26 @@ pcie@2,0 {
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>; 0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; interrupt-map = <0 0 0 1 &pcie2_intc 0>,
<0 0 0 2 &pcie2_intc 1>,
<0 0 0 3 &pcie2_intc 2>,
<0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 5>; clocks = <&gateclk 5>;
status = "disabled"; status = "disabled";
pcie2_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
/* x1 port */ /* x1 port */
...@@ -476,16 +496,26 @@ pcie@3,0 { ...@@ -476,16 +496,26 @@ pcie@3,0 {
reg = <0x1800 0 0 0 0>; reg = <0x1800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>; 0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; interrupt-map = <0 0 0 1 &pcie3_intc 0>,
<0 0 0 2 &pcie3_intc 1>,
<0 0 0 3 &pcie3_intc 2>,
<0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <2>; marvell,pcie-port = <2>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 6>; clocks = <&gateclk 6>;
status = "disabled"; status = "disabled";
pcie3_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
/* /*
...@@ -498,16 +528,26 @@ pcie@4,0 { ...@@ -498,16 +528,26 @@ pcie@4,0 {
reg = <0x2000 0 0 0 0>; reg = <0x2000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>; 0x81000000 0 0 0x81000000 0x4 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; interrupt-map = <0 0 0 1 &pcie4_intc 0>,
<0 0 0 2 &pcie4_intc 1>,
<0 0 0 3 &pcie4_intc 2>,
<0 0 0 4 &pcie4_intc 3>;
marvell,pcie-port = <3>; marvell,pcie-port = <3>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 7>; clocks = <&gateclk 7>;
status = "disabled"; status = "disabled";
pcie4_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
......
...@@ -76,16 +76,26 @@ pcie1: pcie@1,0 { ...@@ -76,16 +76,26 @@ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 58>; interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 5>; clocks = <&gateclk 5>;
status = "disabled"; status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
......
...@@ -164,7 +164,7 @@ scroll-button { ...@@ -164,7 +164,7 @@ scroll-button {
}; };
}; };
spi3 { spi-3 {
compatible = "spi-gpio"; compatible = "spi-gpio";
status = "okay"; status = "okay";
gpio-sck = <&gpio0 25 GPIO_ACTIVE_LOW>; gpio-sck = <&gpio0 25 GPIO_ACTIVE_LOW>;
......
...@@ -83,16 +83,26 @@ pcie1: pcie@1,0 { ...@@ -83,16 +83,26 @@ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 58>; interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 5>; clocks = <&gateclk 5>;
status = "disabled"; status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie2: pcie@2,0 { pcie2: pcie@2,0 {
...@@ -101,16 +111,26 @@ pcie2: pcie@2,0 { ...@@ -101,16 +111,26 @@ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 59>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>; 0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 59>; interrupt-map = <0 0 0 1 &pcie2_intc 0>,
<0 0 0 2 &pcie2_intc 1>,
<0 0 0 3 &pcie2_intc 2>,
<0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <1>; marvell,pcie-lane = <1>;
clocks = <&gateclk 6>; clocks = <&gateclk 6>;
status = "disabled"; status = "disabled";
pcie2_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie3: pcie@3,0 { pcie3: pcie@3,0 {
...@@ -119,16 +139,26 @@ pcie3: pcie@3,0 { ...@@ -119,16 +139,26 @@ pcie3: pcie@3,0 {
reg = <0x1800 0 0 0 0>; reg = <0x1800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 60>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>; 0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 60>; interrupt-map = <0 0 0 1 &pcie3_intc 0>,
<0 0 0 2 &pcie3_intc 1>,
<0 0 0 3 &pcie3_intc 2>,
<0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <2>; marvell,pcie-lane = <2>;
clocks = <&gateclk 7>; clocks = <&gateclk 7>;
status = "disabled"; status = "disabled";
pcie3_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie4: pcie@4,0 { pcie4: pcie@4,0 {
...@@ -137,16 +167,26 @@ pcie4: pcie@4,0 { ...@@ -137,16 +167,26 @@ pcie4: pcie@4,0 {
reg = <0x2000 0 0 0 0>; reg = <0x2000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 61>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>; 0x81000000 0 0 0x81000000 0x4 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 61>; interrupt-map = <0 0 0 1 &pcie4_intc 0>,
<0 0 0 2 &pcie4_intc 1>,
<0 0 0 3 &pcie4_intc 2>,
<0 0 0 4 &pcie4_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <3>; marvell,pcie-lane = <3>;
clocks = <&gateclk 8>; clocks = <&gateclk 8>;
status = "disabled"; status = "disabled";
pcie4_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie5: pcie@5,0 { pcie5: pcie@5,0 {
...@@ -155,16 +195,26 @@ pcie5: pcie@5,0 { ...@@ -155,16 +195,26 @@ pcie5: pcie@5,0 {
reg = <0x2800 0 0 0 0>; reg = <0x2800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 62>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
0x81000000 0 0 0x81000000 0x5 0 1 0>; 0x81000000 0 0 0x81000000 0x5 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 62>; interrupt-map = <0 0 0 1 &pcie5_intc 0>,
<0 0 0 2 &pcie5_intc 1>,
<0 0 0 3 &pcie5_intc 2>,
<0 0 0 4 &pcie5_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 9>; clocks = <&gateclk 9>;
status = "disabled"; status = "disabled";
pcie5_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
......
...@@ -98,16 +98,26 @@ pcie1: pcie@1,0 { ...@@ -98,16 +98,26 @@ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 58>; interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 5>; clocks = <&gateclk 5>;
status = "disabled"; status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie2: pcie@2,0 { pcie2: pcie@2,0 {
...@@ -116,16 +126,26 @@ pcie2: pcie@2,0 { ...@@ -116,16 +126,26 @@ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 59>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>; 0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 59>; interrupt-map = <0 0 0 1 &pcie2_intc 0>,
<0 0 0 2 &pcie2_intc 1>,
<0 0 0 3 &pcie2_intc 2>,
<0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <1>; marvell,pcie-lane = <1>;
clocks = <&gateclk 6>; clocks = <&gateclk 6>;
status = "disabled"; status = "disabled";
pcie2_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie3: pcie@3,0 { pcie3: pcie@3,0 {
...@@ -134,16 +154,26 @@ pcie3: pcie@3,0 { ...@@ -134,16 +154,26 @@ pcie3: pcie@3,0 {
reg = <0x1800 0 0 0 0>; reg = <0x1800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 60>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>; 0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 60>; interrupt-map = <0 0 0 1 &pcie3_intc 0>,
<0 0 0 2 &pcie3_intc 1>,
<0 0 0 3 &pcie3_intc 2>,
<0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <2>; marvell,pcie-lane = <2>;
clocks = <&gateclk 7>; clocks = <&gateclk 7>;
status = "disabled"; status = "disabled";
pcie3_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie4: pcie@4,0 { pcie4: pcie@4,0 {
...@@ -152,16 +182,26 @@ pcie4: pcie@4,0 { ...@@ -152,16 +182,26 @@ pcie4: pcie@4,0 {
reg = <0x2000 0 0 0 0>; reg = <0x2000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 61>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>; 0x81000000 0 0 0x81000000 0x4 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 61>; interrupt-map = <0 0 0 1 &pcie4_intc 0>,
<0 0 0 2 &pcie4_intc 1>,
<0 0 0 3 &pcie4_intc 2>,
<0 0 0 4 &pcie4_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <3>; marvell,pcie-lane = <3>;
clocks = <&gateclk 8>; clocks = <&gateclk 8>;
status = "disabled"; status = "disabled";
pcie4_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie5: pcie@5,0 { pcie5: pcie@5,0 {
...@@ -170,16 +210,26 @@ pcie5: pcie@5,0 { ...@@ -170,16 +210,26 @@ pcie5: pcie@5,0 {
reg = <0x2800 0 0 0 0>; reg = <0x2800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 62>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
0x81000000 0 0 0x81000000 0x5 0 1 0>; 0x81000000 0 0 0x81000000 0x5 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 62>; interrupt-map = <0 0 0 1 &pcie5_intc 0>,
<0 0 0 2 &pcie5_intc 1>,
<0 0 0 3 &pcie5_intc 2>,
<0 0 0 4 &pcie5_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 9>; clocks = <&gateclk 9>;
status = "disabled"; status = "disabled";
pcie5_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie6: pcie@6,0 { pcie6: pcie@6,0 {
...@@ -188,16 +238,26 @@ pcie6: pcie@6,0 { ...@@ -188,16 +238,26 @@ pcie6: pcie@6,0 {
reg = <0x3000 0 0 0 0>; reg = <0x3000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 63>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
0x81000000 0 0 0x81000000 0x6 0 1 0>; 0x81000000 0 0 0x81000000 0x6 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 63>; interrupt-map = <0 0 0 1 &pcie6_intc 0>,
<0 0 0 2 &pcie6_intc 1>,
<0 0 0 3 &pcie6_intc 2>,
<0 0 0 4 &pcie6_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <1>; marvell,pcie-lane = <1>;
clocks = <&gateclk 10>; clocks = <&gateclk 10>;
status = "disabled"; status = "disabled";
pcie6_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie7: pcie@7,0 { pcie7: pcie@7,0 {
...@@ -206,16 +266,26 @@ pcie7: pcie@7,0 { ...@@ -206,16 +266,26 @@ pcie7: pcie@7,0 {
reg = <0x3800 0 0 0 0>; reg = <0x3800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 64>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
0x81000000 0 0 0x81000000 0x7 0 1 0>; 0x81000000 0 0 0x81000000 0x7 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 64>; interrupt-map = <0 0 0 1 &pcie7_intc 0>,
<0 0 0 2 &pcie7_intc 1>,
<0 0 0 3 &pcie7_intc 2>,
<0 0 0 4 &pcie7_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <2>; marvell,pcie-lane = <2>;
clocks = <&gateclk 11>; clocks = <&gateclk 11>;
status = "disabled"; status = "disabled";
pcie7_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie8: pcie@8,0 { pcie8: pcie@8,0 {
...@@ -224,16 +294,26 @@ pcie8: pcie@8,0 { ...@@ -224,16 +294,26 @@ pcie8: pcie@8,0 {
reg = <0x4000 0 0 0 0>; reg = <0x4000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 65>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
0x81000000 0 0 0x81000000 0x8 0 1 0>; 0x81000000 0 0 0x81000000 0x8 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 65>; interrupt-map = <0 0 0 1 &pcie8_intc 0>,
<0 0 0 2 &pcie8_intc 1>,
<0 0 0 3 &pcie8_intc 2>,
<0 0 0 4 &pcie8_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <3>; marvell,pcie-lane = <3>;
clocks = <&gateclk 12>; clocks = <&gateclk 12>;
status = "disabled"; status = "disabled";
pcie8_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie9: pcie@9,0 { pcie9: pcie@9,0 {
...@@ -242,16 +322,26 @@ pcie9: pcie@9,0 { ...@@ -242,16 +322,26 @@ pcie9: pcie@9,0 {
reg = <0x4800 0 0 0 0>; reg = <0x4800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 99>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
0x81000000 0 0 0x81000000 0x9 0 1 0>; 0x81000000 0 0 0x81000000 0x9 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 99>; interrupt-map = <0 0 0 1 &pcie9_intc 0>,
<0 0 0 2 &pcie9_intc 1>,
<0 0 0 3 &pcie9_intc 2>,
<0 0 0 4 &pcie9_intc 3>;
marvell,pcie-port = <2>; marvell,pcie-port = <2>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 26>; clocks = <&gateclk 26>;
status = "disabled"; status = "disabled";
pcie9_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
......
...@@ -119,16 +119,26 @@ pcie1: pcie@1,0 { ...@@ -119,16 +119,26 @@ pcie1: pcie@1,0 {
reg = <0x0800 0 0 0 0>; reg = <0x0800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 58>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 58>; interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 5>; clocks = <&gateclk 5>;
status = "disabled"; status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie2: pcie@2,0 { pcie2: pcie@2,0 {
...@@ -137,16 +147,26 @@ pcie2: pcie@2,0 { ...@@ -137,16 +147,26 @@ pcie2: pcie@2,0 {
reg = <0x1000 0 0 0 0>; reg = <0x1000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 59>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>; 0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 59>; interrupt-map = <0 0 0 1 &pcie2_intc 0>,
<0 0 0 2 &pcie2_intc 1>,
<0 0 0 3 &pcie2_intc 2>,
<0 0 0 4 &pcie2_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <1>; marvell,pcie-lane = <1>;
clocks = <&gateclk 6>; clocks = <&gateclk 6>;
status = "disabled"; status = "disabled";
pcie2_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie3: pcie@3,0 { pcie3: pcie@3,0 {
...@@ -155,16 +175,26 @@ pcie3: pcie@3,0 { ...@@ -155,16 +175,26 @@ pcie3: pcie@3,0 {
reg = <0x1800 0 0 0 0>; reg = <0x1800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 60>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0
0x81000000 0 0 0x81000000 0x3 0 1 0>; 0x81000000 0 0 0x81000000 0x3 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 60>; interrupt-map = <0 0 0 1 &pcie3_intc 0>,
<0 0 0 2 &pcie3_intc 1>,
<0 0 0 3 &pcie3_intc 2>,
<0 0 0 4 &pcie3_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <2>; marvell,pcie-lane = <2>;
clocks = <&gateclk 7>; clocks = <&gateclk 7>;
status = "disabled"; status = "disabled";
pcie3_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie4: pcie@4,0 { pcie4: pcie@4,0 {
...@@ -173,16 +203,26 @@ pcie4: pcie@4,0 { ...@@ -173,16 +203,26 @@ pcie4: pcie@4,0 {
reg = <0x2000 0 0 0 0>; reg = <0x2000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 61>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x4 0 1 0
0x81000000 0 0 0x81000000 0x4 0 1 0>; 0x81000000 0 0 0x81000000 0x4 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 61>; interrupt-map = <0 0 0 1 &pcie4_intc 0>,
<0 0 0 2 &pcie4_intc 1>,
<0 0 0 3 &pcie4_intc 2>,
<0 0 0 4 &pcie4_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <3>; marvell,pcie-lane = <3>;
clocks = <&gateclk 8>; clocks = <&gateclk 8>;
status = "disabled"; status = "disabled";
pcie4_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie5: pcie@5,0 { pcie5: pcie@5,0 {
...@@ -191,16 +231,26 @@ pcie5: pcie@5,0 { ...@@ -191,16 +231,26 @@ pcie5: pcie@5,0 {
reg = <0x2800 0 0 0 0>; reg = <0x2800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 62>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x5 0 1 0
0x81000000 0 0 0x81000000 0x5 0 1 0>; 0x81000000 0 0 0x81000000 0x5 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 62>; interrupt-map = <0 0 0 1 &pcie5_intc 0>,
<0 0 0 2 &pcie5_intc 1>,
<0 0 0 3 &pcie5_intc 2>,
<0 0 0 4 &pcie5_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 9>; clocks = <&gateclk 9>;
status = "disabled"; status = "disabled";
pcie5_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie6: pcie@6,0 { pcie6: pcie@6,0 {
...@@ -209,16 +259,26 @@ pcie6: pcie@6,0 { ...@@ -209,16 +259,26 @@ pcie6: pcie@6,0 {
reg = <0x3000 0 0 0 0>; reg = <0x3000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 63>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x6 0 1 0
0x81000000 0 0 0x81000000 0x6 0 1 0>; 0x81000000 0 0 0x81000000 0x6 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 63>; interrupt-map = <0 0 0 1 &pcie6_intc 0>,
<0 0 0 2 &pcie6_intc 1>,
<0 0 0 3 &pcie6_intc 2>,
<0 0 0 4 &pcie6_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <1>; marvell,pcie-lane = <1>;
clocks = <&gateclk 10>; clocks = <&gateclk 10>;
status = "disabled"; status = "disabled";
pcie6_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie7: pcie@7,0 { pcie7: pcie@7,0 {
...@@ -227,16 +287,26 @@ pcie7: pcie@7,0 { ...@@ -227,16 +287,26 @@ pcie7: pcie@7,0 {
reg = <0x3800 0 0 0 0>; reg = <0x3800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 64>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x7 0 1 0
0x81000000 0 0 0x81000000 0x7 0 1 0>; 0x81000000 0 0 0x81000000 0x7 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 64>; interrupt-map = <0 0 0 1 &pcie7_intc 0>,
<0 0 0 2 &pcie7_intc 1>,
<0 0 0 3 &pcie7_intc 2>,
<0 0 0 4 &pcie7_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <2>; marvell,pcie-lane = <2>;
clocks = <&gateclk 11>; clocks = <&gateclk 11>;
status = "disabled"; status = "disabled";
pcie7_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie8: pcie@8,0 { pcie8: pcie@8,0 {
...@@ -245,16 +315,26 @@ pcie8: pcie@8,0 { ...@@ -245,16 +315,26 @@ pcie8: pcie@8,0 {
reg = <0x4000 0 0 0 0>; reg = <0x4000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 65>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x8 0 1 0
0x81000000 0 0 0x81000000 0x8 0 1 0>; 0x81000000 0 0 0x81000000 0x8 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 65>; interrupt-map = <0 0 0 1 &pcie8_intc 0>,
<0 0 0 2 &pcie8_intc 1>,
<0 0 0 3 &pcie8_intc 2>,
<0 0 0 4 &pcie8_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <3>; marvell,pcie-lane = <3>;
clocks = <&gateclk 12>; clocks = <&gateclk 12>;
status = "disabled"; status = "disabled";
pcie8_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie9: pcie@9,0 { pcie9: pcie@9,0 {
...@@ -263,16 +343,26 @@ pcie9: pcie@9,0 { ...@@ -263,16 +343,26 @@ pcie9: pcie@9,0 {
reg = <0x4800 0 0 0 0>; reg = <0x4800 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 99>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x9 0 1 0
0x81000000 0 0 0x81000000 0x9 0 1 0>; 0x81000000 0 0 0x81000000 0x9 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 99>; interrupt-map = <0 0 0 1 &pcie9_intc 0>,
<0 0 0 2 &pcie9_intc 1>,
<0 0 0 3 &pcie9_intc 2>,
<0 0 0 4 &pcie9_intc 3>;
marvell,pcie-port = <2>; marvell,pcie-port = <2>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 26>; clocks = <&gateclk 26>;
status = "disabled"; status = "disabled";
pcie9_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie10: pcie@a,0 { pcie10: pcie@a,0 {
...@@ -281,16 +371,26 @@ pcie10: pcie@a,0 { ...@@ -281,16 +371,26 @@ pcie10: pcie@a,0 {
reg = <0x5000 0 0 0 0>; reg = <0x5000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
interrupt-names = "intx";
interrupts-extended = <&mpic 103>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0 ranges = <0x82000000 0 0 0x82000000 0xa 0 1 0
0x81000000 0 0 0x81000000 0xa 0 1 0>; 0x81000000 0 0 0x81000000 0xa 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 0 &mpic 103>; interrupt-map = <0 0 0 1 &pcie10_intc 0>,
<0 0 0 2 &pcie10_intc 1>,
<0 0 0 3 &pcie10_intc 2>,
<0 0 0 4 &pcie10_intc 3>;
marvell,pcie-port = <3>; marvell,pcie-port = <3>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gateclk 27>; clocks = <&gateclk 27>;
status = "disabled"; status = "disabled";
pcie10_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
......
...@@ -122,8 +122,18 @@ pcie0: pcie@1 { ...@@ -122,8 +122,18 @@ pcie0: pcie@1 {
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>; interrupt-names = "intx", "error";
interrupt-map = <0 0 0 0 &intc 16>; interrupts = <16>, <15>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie0_intc 0>,
<0 0 0 2 &pcie0_intc 1>,
<0 0 0 3 &pcie0_intc 2>,
<0 0 0 4 &pcie0_intc 3>;
pcie0_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie1: pcie@2 { pcie1: pcie@2 {
...@@ -141,8 +151,18 @@ pcie1: pcie@2 { ...@@ -141,8 +151,18 @@ pcie1: pcie@2 {
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>; interrupt-names = "intx", "error";
interrupt-map = <0 0 0 0 &intc 18>; interrupts = <18>, <17>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
......
...@@ -26,12 +26,22 @@ pcie0: pcie@1,0 { ...@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-names = "intx", "error";
interrupt-map = <0 0 0 0 &intc 9>; interrupts = <9>, <44>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc 0>,
<0 0 0 2 &pcie_intc 1>,
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>; clocks = <&gate_clk 2>;
status = "disabled"; status = "disabled";
pcie_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
}; };
......
...@@ -26,12 +26,22 @@ pcie0: pcie@1,0 { ...@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-names = "intx", "error";
interrupt-map = <0 0 0 0 &intc 9>; interrupts = <9>, <44>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc 0>,
<0 0 0 2 &pcie_intc 1>,
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>; clocks = <&gate_clk 2>;
status = "disabled"; status = "disabled";
pcie_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
}; };
......
...@@ -30,12 +30,22 @@ pcie0: pcie@1,0 { ...@@ -30,12 +30,22 @@ pcie0: pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-names = "intx", "error";
interrupt-map = <0 0 0 0 &intc 9>; interrupts = <9>, <44>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie0_intc 0>,
<0 0 0 2 &pcie0_intc 1>,
<0 0 0 3 &pcie0_intc 2>,
<0 0 0 4 &pcie0_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>; clocks = <&gate_clk 2>;
status = "disabled"; status = "disabled";
pcie0_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
pcie1: pcie@2,0 { pcie1: pcie@2,0 {
...@@ -48,12 +58,22 @@ pcie1: pcie@2,0 { ...@@ -48,12 +58,22 @@ pcie1: pcie@2,0 {
ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
0x81000000 0 0 0x81000000 0x2 0 1 0>; 0x81000000 0 0 0x81000000 0x2 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-names = "intx", "error";
interrupt-map = <0 0 0 0 &intc 10>; interrupts = <10>, <45>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie1_intc 0>,
<0 0 0 2 &pcie1_intc 1>,
<0 0 0 3 &pcie1_intc 2>,
<0 0 0 4 &pcie1_intc 3>;
marvell,pcie-port = <1>; marvell,pcie-port = <1>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gate_clk 18>; clocks = <&gate_clk 18>;
status = "disabled"; status = "disabled";
pcie1_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
}; };
......
...@@ -26,12 +26,22 @@ pcie0: pcie@1,0 { ...@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
0x81000000 0 0 0x81000000 0x1 0 1 0>; 0x81000000 0 0 0x81000000 0x1 0 1 0>;
bus-range = <0x00 0xff>; bus-range = <0x00 0xff>;
interrupt-map-mask = <0 0 0 0>; interrupt-names = "intx", "error";
interrupt-map = <0 0 0 0 &intc 9>; interrupts = <9>, <44>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc 0>,
<0 0 0 2 &pcie_intc 1>,
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
marvell,pcie-port = <0>; marvell,pcie-port = <0>;
marvell,pcie-lane = <0>; marvell,pcie-lane = <0>;
clocks = <&gate_clk 2>; clocks = <&gate_clk 2>;
status = "disabled"; status = "disabled";
pcie_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
};
}; };
}; };
}; };
......
...@@ -10,6 +10,11 @@ chosen { ...@@ -10,6 +10,11 @@ chosen {
ocp@f1000000 { ocp@f1000000 {
pinctrl: pin-controller@10000 { pinctrl: pin-controller@10000 {
/* Non-default UART pins */
pmx_uart0: pmx-uart0 {
marvell,pins = "mpp4", "mpp5";
};
pmx_power_hdd: pmx-power-hdd { pmx_power_hdd: pmx-power-hdd {
marvell,pins = "mpp10"; marvell,pins = "mpp10";
marvell,function = "gpo"; marvell,function = "gpo";
...@@ -213,22 +218,11 @@ hdd_power: regulator@2 { ...@@ -213,22 +218,11 @@ hdd_power: regulator@2 {
&mdio { &mdio {
status = "okay"; status = "okay";
ethphy0: ethernet-phy@0 {
reg = <0>;
};
ethphy1: ethernet-phy@8 { ethphy1: ethernet-phy@8 {
reg = <8>; reg = <8>;
}; };
}; };
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};
&eth1 { &eth1 {
status = "okay"; status = "okay";
ethernet1-port@0 { ethernet1-port@0 {
......
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