Commit 02248981 authored by Elliot Berman's avatar Elliot Berman Committed by Bjorn Andersson

firmware: qcom_scm-32: Use SMC arch wrappers

Use SMC arch wrappers instead of inline assembly.

Tested-by: Brian Masney <masneyb@onstation.org> # arm32
Tested-by: default avatarStephan Gerhold <stephan@gerhold.net>
Signed-off-by: default avatarElliot Berman <eberman@codeaurora.org>
Link: https://lore.kernel.org/r/1578431066-19600-10-git-send-email-eberman@codeaurora.orgSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 5dad8dee
...@@ -20,7 +20,6 @@ obj-$(CONFIG_FW_CFG_SYSFS) += qemu_fw_cfg.o ...@@ -20,7 +20,6 @@ obj-$(CONFIG_FW_CFG_SYSFS) += qemu_fw_cfg.o
obj-$(CONFIG_QCOM_SCM) += qcom_scm.o obj-$(CONFIG_QCOM_SCM) += qcom_scm.o
obj-$(CONFIG_QCOM_SCM_64) += qcom_scm-64.o obj-$(CONFIG_QCOM_SCM_64) += qcom_scm-64.o
obj-$(CONFIG_QCOM_SCM_32) += qcom_scm-32.o obj-$(CONFIG_QCOM_SCM_32) += qcom_scm-32.o
CFLAGS_qcom_scm-32.o :=$(call as-instr,.arch armv7-a\n.arch_extension sec,-DREQUIRES_SEC=1) -march=armv7-a
obj-$(CONFIG_TI_SCI_PROTOCOL) += ti_sci.o obj-$(CONFIG_TI_SCI_PROTOCOL) += ti_sci.o
obj-$(CONFIG_TRUSTED_FOUNDATIONS) += trusted_foundations.o obj-$(CONFIG_TRUSTED_FOUNDATIONS) += trusted_foundations.o
obj-$(CONFIG_TURRIS_MOX_RWTM) += turris-mox-rwtm.o obj-$(CONFIG_TURRIS_MOX_RWTM) += turris-mox-rwtm.o
......
...@@ -10,6 +10,7 @@ ...@@ -10,6 +10,7 @@
#include <linux/errno.h> #include <linux/errno.h>
#include <linux/err.h> #include <linux/err.h>
#include <linux/qcom_scm.h> #include <linux/qcom_scm.h>
#include <linux/arm-smccc.h>
#include <linux/dma-mapping.h> #include <linux/dma-mapping.h>
#include "qcom_scm.h" #include "qcom_scm.h"
...@@ -121,25 +122,13 @@ static inline void *scm_legacy_get_response_buffer( ...@@ -121,25 +122,13 @@ static inline void *scm_legacy_get_response_buffer(
static u32 __scm_legacy_do(u32 cmd_addr) static u32 __scm_legacy_do(u32 cmd_addr)
{ {
int context_id; int context_id;
register u32 r0 asm("r0") = 1; struct arm_smccc_res res;
register u32 r1 asm("r1") = (u32)&context_id;
register u32 r2 asm("r2") = cmd_addr;
do { do {
asm volatile( arm_smccc_smc(1, (unsigned long)&context_id, cmd_addr,
__asmeq("%0", "r0") 0, 0, 0, 0, 0, &res);
__asmeq("%1", "r0") } while (res.a0 == QCOM_SCM_INTERRUPTED);
__asmeq("%2", "r1")
__asmeq("%3", "r2") return res.a0;
#ifdef REQUIRES_SEC
".arch_extension sec\n"
#endif
"smc #0 @ switch to secure world\n"
: "=r" (r0)
: "r" (r0), "r" (r1), "r" (r2)
: "r3", "r12");
} while (r0 == QCOM_SCM_INTERRUPTED);
return r0;
} }
/** /**
...@@ -237,24 +226,12 @@ static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id, ...@@ -237,24 +226,12 @@ static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id,
static s32 qcom_scm_call_atomic1(u32 svc, u32 cmd, u32 arg1) static s32 qcom_scm_call_atomic1(u32 svc, u32 cmd, u32 arg1)
{ {
int context_id; int context_id;
struct arm_smccc_res res;
arm_smccc_smc(SCM_LEGACY_ATOMIC_ID(svc, cmd, 1),
(unsigned long)&context_id, arg1, 0, 0, 0, 0, 0, &res);
register u32 r0 asm("r0") = SCM_LEGACY_ATOMIC_ID(svc, cmd, 1); return res.a0;
register u32 r1 asm("r1") = (u32)&context_id;
register u32 r2 asm("r2") = arg1;
asm volatile(
__asmeq("%0", "r0")
__asmeq("%1", "r0")
__asmeq("%2", "r1")
__asmeq("%3", "r2")
#ifdef REQUIRES_SEC
".arch_extension sec\n"
#endif
"smc #0 @ switch to secure world\n"
: "=r" (r0)
: "r" (r0), "r" (r1), "r" (r2)
: "r3", "r12");
return r0;
} }
/** /**
...@@ -270,26 +247,12 @@ static s32 qcom_scm_call_atomic1(u32 svc, u32 cmd, u32 arg1) ...@@ -270,26 +247,12 @@ static s32 qcom_scm_call_atomic1(u32 svc, u32 cmd, u32 arg1)
static s32 qcom_scm_call_atomic2(u32 svc, u32 cmd, u32 arg1, u32 arg2) static s32 qcom_scm_call_atomic2(u32 svc, u32 cmd, u32 arg1, u32 arg2)
{ {
int context_id; int context_id;
struct arm_smccc_res res;
arm_smccc_smc(SCM_LEGACY_ATOMIC_ID(svc, cmd, 2),
(unsigned long)&context_id, arg1, 0, 0, 0, 0, 0, &res);
register u32 r0 asm("r0") = SCM_LEGACY_ATOMIC_ID(svc, cmd, 2); return res.a0;
register u32 r1 asm("r1") = (u32)&context_id;
register u32 r2 asm("r2") = arg1;
register u32 r3 asm("r3") = arg2;
asm volatile(
__asmeq("%0", "r0")
__asmeq("%1", "r0")
__asmeq("%2", "r1")
__asmeq("%3", "r2")
__asmeq("%4", "r3")
#ifdef REQUIRES_SEC
".arch_extension sec\n"
#endif
"smc #0 @ switch to secure world\n"
: "=r" (r0)
: "r" (r0), "r" (r1), "r" (r2), "r" (r3)
: "r12");
return r0;
} }
/** /**
......
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