Commit 027cca9e authored by Stephan Gerhold's avatar Stephan Gerhold Committed by Bjorn Andersson

arm64: dts: qcom: msm8916: Fix MDP/DSI interrupts

The mdss node sets #interrupt-cells = <1>, so its interrupts
should be referenced using a single cell (in this case: only the
interrupt number).

However, right now the mdp/dsi node both have two interrupt cells
set, e.g. interrupts = <4 0>. The 0 is probably meant to say
IRQ_TYPE_NONE (= 0), but with #interrupt-cells = <1> this is
actually interpreted as a second interrupt line.

Remove the IRQ flags from both interrupts to fix this.

Fixes: 305410ff ("arm64: dts: msm8916: Add display support")
Signed-off-by: default avatarStephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20200915071221.72895-5-stephan@gerhold.netSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent c2f0cbb5
...@@ -1068,7 +1068,7 @@ mdp: mdp@1a01000 { ...@@ -1068,7 +1068,7 @@ mdp: mdp@1a01000 {
reg-names = "mdp_phys"; reg-names = "mdp_phys";
interrupt-parent = <&mdss>; interrupt-parent = <&mdss>;
interrupts = <0 0>; interrupts = <0>;
clocks = <&gcc GCC_MDSS_AHB_CLK>, clocks = <&gcc GCC_MDSS_AHB_CLK>,
<&gcc GCC_MDSS_AXI_CLK>, <&gcc GCC_MDSS_AXI_CLK>,
...@@ -1100,7 +1100,7 @@ dsi0: dsi@1a98000 { ...@@ -1100,7 +1100,7 @@ dsi0: dsi@1a98000 {
reg-names = "dsi_ctrl"; reg-names = "dsi_ctrl";
interrupt-parent = <&mdss>; interrupt-parent = <&mdss>;
interrupts = <4 0>; interrupts = <4>;
assigned-clocks = <&gcc BYTE0_CLK_SRC>, assigned-clocks = <&gcc BYTE0_CLK_SRC>,
<&gcc PCLK0_CLK_SRC>; <&gcc PCLK0_CLK_SRC>;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment