Commit 02afe8a7 authored by Santosh Shilimkar's avatar Santosh Shilimkar Committed by Kevin Hilman

ARM: OMAP4: Export omap4_get_base*() rather than global address pointers

This patch exports APIs to get base address for GIC
distributor, CPU interface, SCU and PL310 L2 Cache which
are used in OMAP4 PM code.

This was suggested by Kevin Hilman <khilman@ti.com> during
OMAP4 PM code review.
Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: default avatarJean Pihet <j-pihet@ti.com>
Reviewed-by: default avatarKevin Hilman <khilman@ti.com>
Tested-by: default avatarVishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@ti.com>
parent 0db1803e
......@@ -168,7 +168,16 @@ void omap3_intc_handle_irq(struct pt_regs *regs);
#endif
#ifdef CONFIG_CACHE_L2X0
extern void __iomem *l2cache_base;
extern void __iomem *omap4_get_l2cache_base(void);
#endif
#ifdef CONFIG_SMP
extern void __iomem *omap4_get_scu_base(void);
#else
static inline void __iomem *omap4_get_scu_base(void)
{
return NULL;
}
#endif
extern void __init gic_init_irq(void);
......
......@@ -32,6 +32,11 @@ static void __iomem *scu_base;
static DEFINE_SPINLOCK(boot_lock);
void __iomem *omap4_get_scu_base(void)
{
return scu_base;
}
void __cpuinit platform_secondary_init(unsigned int cpu)
{
/*
......
......@@ -26,7 +26,7 @@
#include "common.h"
#ifdef CONFIG_CACHE_L2X0
void __iomem *l2cache_base;
static void __iomem *l2cache_base;
#endif
void __init gic_init_irq(void)
......@@ -47,6 +47,11 @@ void __init gic_init_irq(void)
#ifdef CONFIG_CACHE_L2X0
void __iomem *omap4_get_l2cache_base(void)
{
return l2cache_base;
}
static void omap4_l2x0_disable(void)
{
/* Disable PL310 L2 Cache controller */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment