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Commit 02f958a2 authored by Likun Gao's avatar Likun Gao Committed by Alex Deucher
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drm/amdgpu: refactor function to init no-psp fw 

Refactor the code of amdgpu_ucode_init_single_fw to make it more
readable as too many ucode need to handle on this function currently.
Signed-off-by: default avatarLikun Gao <Likun.Gao@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 06dd1888
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Inline Side-by-side
Showing with 75 additions and 85 deletions
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c
View file @ 02f958a2
...@@ -572,6 +572,7 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, ...@@ -572,6 +572,7 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
const struct dmcu_firmware_header_v1_0 *dmcu_hdr = NULL; const struct dmcu_firmware_header_v1_0 *dmcu_hdr = NULL;
const struct dmcub_firmware_header_v1_0 *dmcub_hdr = NULL; const struct dmcub_firmware_header_v1_0 *dmcub_hdr = NULL;
const struct mes_firmware_header_v1_0 *mes_hdr = NULL; const struct mes_firmware_header_v1_0 *mes_hdr = NULL;
u8 *ucode_addr;
if (NULL == ucode->fw) if (NULL == ucode->fw)
return 0; return 0;
...@@ -588,94 +589,83 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev, ...@@ -588,94 +589,83 @@ static int amdgpu_ucode_init_single_fw(struct amdgpu_device *adev,
dmcub_hdr = (const struct dmcub_firmware_header_v1_0 *)ucode->fw->data; dmcub_hdr = (const struct dmcub_firmware_header_v1_0 *)ucode->fw->data;
mes_hdr = (const struct mes_firmware_header_v1_0 *)ucode->fw->data; mes_hdr = (const struct mes_firmware_header_v1_0 *)ucode->fw->data;
if (adev->firmware.load_type != AMDGPU_FW_LOAD_PSP || if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
(ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC1 && switch (ucode->ucode_id) {
ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC2 && case AMDGPU_UCODE_ID_CP_MEC1:
ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC1_JT && case AMDGPU_UCODE_ID_CP_MEC2:
ucode->ucode_id != AMDGPU_UCODE_ID_CP_MEC2_JT && ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes) -
ucode->ucode_id != AMDGPU_UCODE_ID_CP_MES && le32_to_cpu(cp_hdr->jt_size) * 4;
ucode->ucode_id != AMDGPU_UCODE_ID_CP_MES_DATA && ucode_addr = (u8 *)ucode->fw->data +
ucode->ucode_id != AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL && le32_to_cpu(header->ucode_array_offset_bytes);
ucode->ucode_id != AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM && break;
ucode->ucode_id != AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM && case AMDGPU_UCODE_ID_CP_MEC1_JT:
ucode->ucode_id != AMDGPU_UCODE_ID_RLC_IRAM && case AMDGPU_UCODE_ID_CP_MEC2_JT:
ucode->ucode_id != AMDGPU_UCODE_ID_RLC_DRAM && ucode->ucode_size = le32_to_cpu(cp_hdr->jt_size) * 4;
ucode->ucode_id != AMDGPU_UCODE_ID_DMCU_ERAM && ucode_addr = (u8 *)ucode->fw->data +
ucode->ucode_id != AMDGPU_UCODE_ID_DMCU_INTV && le32_to_cpu(header->ucode_array_offset_bytes) +
ucode->ucode_id != AMDGPU_UCODE_ID_DMCUB)) { le32_to_cpu(cp_hdr->jt_offset) * 4;
ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes); break;
case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL:
memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data + ucode->ucode_size = adev->gfx.rlc.save_restore_list_cntl_size_bytes;
le32_to_cpu(header->ucode_array_offset_bytes)), ucode_addr = adev->gfx.rlc.save_restore_list_cntl;
ucode->ucode_size); break;
} else if (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC1 || case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM:
ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC2) { ucode->ucode_size = adev->gfx.rlc.save_restore_list_gpm_size_bytes;
ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes) - ucode_addr = adev->gfx.rlc.save_restore_list_gpm;
le32_to_cpu(cp_hdr->jt_size) * 4; break;
case AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM:
memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data + ucode->ucode_size = adev->gfx.rlc.save_restore_list_srm_size_bytes;
le32_to_cpu(header->ucode_array_offset_bytes)), ucode_addr = adev->gfx.rlc.save_restore_list_srm;
ucode->ucode_size); break;
} else if (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC1_JT || case AMDGPU_UCODE_ID_RLC_IRAM:
ucode->ucode_id == AMDGPU_UCODE_ID_CP_MEC2_JT) { ucode->ucode_size = adev->gfx.rlc.rlc_iram_ucode_size_bytes;
ucode->ucode_size = le32_to_cpu(cp_hdr->jt_size) * 4; ucode_addr = adev->gfx.rlc.rlc_iram_ucode;
break;
memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data + case AMDGPU_UCODE_ID_RLC_DRAM:
le32_to_cpu(header->ucode_array_offset_bytes) + ucode->ucode_size = adev->gfx.rlc.rlc_dram_ucode_size_bytes;
le32_to_cpu(cp_hdr->jt_offset) * 4), ucode_addr = adev->gfx.rlc.rlc_dram_ucode;
ucode->ucode_size); break;
} else if (ucode->ucode_id == AMDGPU_UCODE_ID_DMCU_ERAM) { case AMDGPU_UCODE_ID_CP_MES:
ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes) - ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_size_bytes);
ucode_addr = (u8 *)ucode->fw->data +
le32_to_cpu(mes_hdr->mes_ucode_offset_bytes);
break;
case AMDGPU_UCODE_ID_CP_MES_DATA:
ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_data_size_bytes);
ucode_addr = (u8 *)ucode->fw->data +
le32_to_cpu(mes_hdr->mes_ucode_data_offset_bytes);
break;
case AMDGPU_UCODE_ID_DMCU_ERAM:
ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes) -
le32_to_cpu(dmcu_hdr->intv_size_bytes); le32_to_cpu(dmcu_hdr->intv_size_bytes);
ucode_addr = (u8 *)ucode->fw->data +
memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data + le32_to_cpu(header->ucode_array_offset_bytes);
le32_to_cpu(header->ucode_array_offset_bytes)), break;
ucode->ucode_size); case AMDGPU_UCODE_ID_DMCU_INTV:
} else if (ucode->ucode_id == AMDGPU_UCODE_ID_DMCU_INTV) { ucode->ucode_size = le32_to_cpu(dmcu_hdr->intv_size_bytes);
ucode->ucode_size = le32_to_cpu(dmcu_hdr->intv_size_bytes); ucode_addr = (u8 *)ucode->fw->data +
le32_to_cpu(header->ucode_array_offset_bytes) +
memcpy(ucode->kaddr, (void *)((uint8_t *)ucode->fw->data + le32_to_cpu(dmcu_hdr->intv_offset_bytes);
le32_to_cpu(header->ucode_array_offset_bytes) + break;
le32_to_cpu(dmcu_hdr->intv_offset_bytes)), case AMDGPU_UCODE_ID_DMCUB:
ucode->ucode_size); ucode->ucode_size = le32_to_cpu(dmcub_hdr->inst_const_bytes);
} else if (ucode->ucode_id == AMDGPU_UCODE_ID_DMCUB) { ucode_addr = (u8 *)ucode->fw->data +
ucode->ucode_size = le32_to_cpu(dmcub_hdr->inst_const_bytes); le32_to_cpu(header->ucode_array_offset_bytes);
memcpy(ucode->kaddr, break;
(void *)((uint8_t *)ucode->fw->data + default:
le32_to_cpu(header->ucode_array_offset_bytes)), ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes);
ucode->ucode_size); ucode_addr = (u8 *)ucode->fw->data +
} else if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_CNTL) { le32_to_cpu(header->ucode_array_offset_bytes);
ucode->ucode_size = adev->gfx.rlc.save_restore_list_cntl_size_bytes; break;
memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_cntl, }
ucode->ucode_size); } else {
} else if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_GPM_MEM) { ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes);
ucode->ucode_size = adev->gfx.rlc.save_restore_list_gpm_size_bytes; ucode_addr = (u8 *)ucode->fw->data +
memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_gpm, le32_to_cpu(header->ucode_array_offset_bytes);
ucode->ucode_size);
} else if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_RESTORE_LIST_SRM_MEM) {
ucode->ucode_size = adev->gfx.rlc.save_restore_list_srm_size_bytes;
memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_srm,
ucode->ucode_size);
} else if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_IRAM) {
ucode->ucode_size = adev->gfx.rlc.rlc_iram_ucode_size_bytes;
memcpy(ucode->kaddr, adev->gfx.rlc.rlc_iram_ucode,
ucode->ucode_size);
} else if (ucode->ucode_id == AMDGPU_UCODE_ID_RLC_DRAM) {
ucode->ucode_size = adev->gfx.rlc.rlc_dram_ucode_size_bytes;
memcpy(ucode->kaddr, adev->gfx.rlc.rlc_dram_ucode,
ucode->ucode_size);
} else if (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MES) {
ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_size_bytes);
memcpy(ucode->kaddr, (void *)((uint8_t *)adev->mes.fw->data +
le32_to_cpu(mes_hdr->mes_ucode_offset_bytes)),
ucode->ucode_size);
} else if (ucode->ucode_id == AMDGPU_UCODE_ID_CP_MES_DATA) {
ucode->ucode_size = le32_to_cpu(mes_hdr->mes_ucode_data_size_bytes);
memcpy(ucode->kaddr, (void *)((uint8_t *)adev->mes.fw->data +
le32_to_cpu(mes_hdr->mes_ucode_data_offset_bytes)),
ucode->ucode_size);
} }
memcpy(ucode->kaddr, ucode_addr, ucode->ucode_size);
return 0; return 0;
} }
......
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