Commit 035b2f7c authored by José Miguel Gonçalves's avatar José Miguel Gonçalves Committed by Linus Walleij

ARM: S3C24XX: Fix configuration of gpio port sizes on S3C24XX.

Some GPIO line limits are incorrectly set which, for instance,
does not allow nRTS1 (GPH11) configuration on a S3C2416 chip.

Signed-off-by: José Miguel Gonçalves <jose.goncalves@inov.pt>
Reviewed-by: default avatarHeiko Stuebner <heiko@sntech.de>
Acked-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 523639e6
......@@ -1059,7 +1059,7 @@ struct samsung_gpio_chip s3c24xx_gpios[] = {
.base = S3C2410_GPA(0),
.owner = THIS_MODULE,
.label = "GPIOA",
.ngpio = 24,
.ngpio = 27,
.direction_input = s3c24xx_gpiolib_banka_input,
.direction_output = s3c24xx_gpiolib_banka_output,
},
......@@ -1068,7 +1068,7 @@ struct samsung_gpio_chip s3c24xx_gpios[] = {
.base = S3C2410_GPB(0),
.owner = THIS_MODULE,
.label = "GPIOB",
.ngpio = 16,
.ngpio = 11,
},
}, {
.chip = {
......@@ -1113,7 +1113,7 @@ struct samsung_gpio_chip s3c24xx_gpios[] = {
.base = S3C2410_GPH(0),
.owner = THIS_MODULE,
.label = "GPIOH",
.ngpio = 11,
.ngpio = 15,
},
},
/* GPIOS for the S3C2443 and later devices. */
......
......@@ -23,17 +23,17 @@
* 2410 2412 2440 2443 2416
* 2442
* ---- ---- ---- ---- ----
* A 23 22 25 16 25
* B 11 11 11 11 9
* C 16 15 16 16 16
* A 23 22 25 16 27
* B 11 11 11 11 11
* C 16 16 16 16 16
* D 16 16 16 16 16
* E 16 16 16 16 16
* F 8 8 8 8 8
* G 16 16 16 16 8
* H 11 11 9 15 15
* H 11 11 11 15 15
* J -- -- 13 16 --
* K -- -- -- -- 16
* L -- -- -- 15 7
* L -- -- -- 15 14
* M -- -- -- 2 2
*/
......
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