wifi: rtw89: debug: txpwr table supports Wi-Fi 7 chips

We add TX power table format for Wi-Fi 7 chips. Since Wi-Fi 7 tables are
larger, in order to reuse some chunks, we extend code to process nested
entries. Now, dbgfs txpwr_table can work with Wi-Fi 7 chips.

An output example of dbgfs txpwr_table on Wi-Fi 7 chips is shown below.
...
[TX power byrate]
	<< BW20 >>
CCK       	-  1M      2M      5.5M   11M  	|  20,  20,  20,  20,	dBm
LEGACY    	-  6M      9M      12M    18M  	|  18,  18,  18,  18,	dBm
LEGACY    	-  24M     36M     48M    54M  	|  18,  18,  17,  16,	dBm
EHT       	-  MCS14   MCS15 		|   0,   0,		dBm
DLRU_EHT  	-  MCS14   MCS15 		|   0,  18,		dBm
MCS_1SS       	-  MCS0    MCS1    MCS2   MCS3 	|  18,  18,  18,  18,	dBm
MCS_1SS       	-  MCS4    MCS5    MCS6   MCS7 	|  18,  17,  16,  15,	dBm
MCS_1SS       	-  MCS8    MCS9    MCS10  MCS11	|  14,  13,  12,  11,	dBm
MCS_1SS       	-  MCS12   MCS13 		|  10,   9,		dBm
HEDCM_1SS     	-  MCS0    MCS1    MCS3   MCS4 	|  18,  18,  18,  18,	dBm
DLRU_MCS_1SS  	-  MCS0    MCS1    MCS2   MCS3 	|  18,  18,  18,  18,	dBm
DLRU_MCS_1SS  	-  MCS4    MCS5    MCS6   MCS7 	|  18,  17,  16,  15,	dBm
DLRU_MCS_1SS  	-  MCS8    MCS9    MCS10  MCS11	|  14,  13,  12,  11,	dBm
DLRU_MCS_1SS  	-  MCS12   MCS13 		|  10,   9,		dBm
DLRU_HEDCM_1SS	-  MCS0    MCS1    MCS3   MCS4 	|  18,  18,  18,  18,	dBm
MCS_2SS       	-  MCS0    MCS1    MCS2   MCS3 	|  18,  18,  18,  18,	dBm
...
[TX power limit]
	<< 1TX >>
CCK_20M    	-  NON_BF  BF	|   0,   0,		dBm
CCK_40M    	-  NON_BF  BF	|   0,   0,		dBm
OFDM       	-  NON_BF  BF	|  18,   0,		dBm
MCS_20M_0  	-  NON_BF  BF	|  18,   0,		dBm
MCS_20M_1  	-  NON_BF  BF	|   0,   0,		dBm
...
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/20231003015446.14658-8-pkshih@realtek.com

drivers/net/wireless/realtek/rtw89/reg.h

@@ -3943,8 +3943,11 @@
 
 #define R_BE_PWR_RATE_OFST_CTRL 0x11A30
 #define R_BE_PWR_BY_RATE 0x11E00
+#define R_BE_PWR_BY_RATE_MAX 0x11FA8
 #define R_BE_PWR_LMT 0x11FAC
+#define R_BE_PWR_LMT_MAX 0x12040
 #define R_BE_PWR_RU_LMT 0x12048
+#define R_BE_PWR_RU_LMT_MAX 0x120E4
 
 #define CMAC1_START_ADDR_BE 0x14000
 #define CMAC1_END_ADDR_BE 0x17FFF