Commit 03b5d924 authored by Balaji T K's avatar Balaji T K Committed by Chris Ball

mmc: omap_hsmmc: add DDR support

Add Dual data rate support for omap_hsmmc.
Signed-off-by: default avatarBalaji T K <balajitk@ti.com>
Signed-off-by: default avatarVenkatraman S <svenkatr@ti.com>
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent dba3c29e
...@@ -92,6 +92,7 @@ ...@@ -92,6 +92,7 @@
#define MSBS (1 << 5) #define MSBS (1 << 5)
#define BCE (1 << 1) #define BCE (1 << 1)
#define FOUR_BIT (1 << 1) #define FOUR_BIT (1 << 1)
#define DDR (1 << 19)
#define DW8 (1 << 5) #define DW8 (1 << 5)
#define CC 0x1 #define CC 0x1
#define TC 0x02 #define TC 0x02
...@@ -523,6 +524,10 @@ static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host) ...@@ -523,6 +524,10 @@ static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host)
u32 con; u32 con;
con = OMAP_HSMMC_READ(host->base, CON); con = OMAP_HSMMC_READ(host->base, CON);
if (ios->timing == MMC_TIMING_UHS_DDR50)
con |= DDR; /* configure in DDR mode */
else
con &= ~DDR;
switch (ios->bus_width) { switch (ios->bus_width) {
case MMC_BUS_WIDTH_8: case MMC_BUS_WIDTH_8:
OMAP_HSMMC_WRITE(host->base, CON, con | DW8); OMAP_HSMMC_WRITE(host->base, CON, con | DW8);
......
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