Commit 03c79cc5 authored by Seokmann Ju's avatar Seokmann Ju Committed by James Bottomley

[SCSI] qla2xxx: Remove unnecessary spinlock primitive - mbx_reg_lock.

Since, mailbox commands are executed in a synchronous
manner, there is no need to have a separate spinlock
primitive to protect data/register access shared by callers.
Signed-off-by: default avatarSeokmann Ju <seokmann.ju@qlogic.com>
Signed-off-by: default avatarAndrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: default avatarJames Bottomley <James.Bottomley@SteelEye.com>
parent 7c98a046
...@@ -2338,8 +2338,6 @@ typedef struct scsi_qla_host { ...@@ -2338,8 +2338,6 @@ typedef struct scsi_qla_host {
#define MBX_INTR_WAIT 2 #define MBX_INTR_WAIT 2
#define MBX_UPDATE_FLASH_ACTIVE 3 #define MBX_UPDATE_FLASH_ACTIVE 3
spinlock_t mbx_reg_lock; /* Mbx Cmd Register Lock */
struct semaphore mbx_cmd_sem; /* Serialialize mbx access */ struct semaphore mbx_cmd_sem; /* Serialialize mbx access */
struct semaphore mbx_intr_sem; /* Used for completion notification */ struct semaphore mbx_intr_sem; /* Used for completion notification */
......
...@@ -86,12 +86,8 @@ qla2100_intr_handler(int irq, void *dev_id) ...@@ -86,12 +86,8 @@ qla2100_intr_handler(int irq, void *dev_id)
if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
(status & MBX_INTERRUPT) && ha->flags.mbox_int) { (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
spin_lock_irqsave(&ha->mbx_reg_lock, flags);
set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
up(&ha->mbx_intr_sem); up(&ha->mbx_intr_sem);
spin_unlock_irqrestore(&ha->mbx_reg_lock, flags);
} }
return (IRQ_HANDLED); return (IRQ_HANDLED);
...@@ -197,12 +193,8 @@ qla2300_intr_handler(int irq, void *dev_id) ...@@ -197,12 +193,8 @@ qla2300_intr_handler(int irq, void *dev_id)
if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
(status & MBX_INTERRUPT) && ha->flags.mbox_int) { (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
spin_lock_irqsave(&ha->mbx_reg_lock, flags);
set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
up(&ha->mbx_intr_sem); up(&ha->mbx_intr_sem);
spin_unlock_irqrestore(&ha->mbx_reg_lock, flags);
} }
return (IRQ_HANDLED); return (IRQ_HANDLED);
...@@ -1491,12 +1483,8 @@ qla24xx_intr_handler(int irq, void *dev_id) ...@@ -1491,12 +1483,8 @@ qla24xx_intr_handler(int irq, void *dev_id)
if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
(status & MBX_INTERRUPT) && ha->flags.mbox_int) { (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
spin_lock_irqsave(&ha->mbx_reg_lock, flags);
set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
up(&ha->mbx_intr_sem); up(&ha->mbx_intr_sem);
spin_unlock_irqrestore(&ha->mbx_reg_lock, flags);
} }
return IRQ_HANDLED; return IRQ_HANDLED;
...@@ -1629,12 +1617,8 @@ qla24xx_msix_default(int irq, void *dev_id) ...@@ -1629,12 +1617,8 @@ qla24xx_msix_default(int irq, void *dev_id)
if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
(status & MBX_INTERRUPT) && ha->flags.mbox_int) { (status & MBX_INTERRUPT) && ha->flags.mbox_int) {
spin_lock_irqsave(&ha->mbx_reg_lock, flags);
set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
up(&ha->mbx_intr_sem); up(&ha->mbx_intr_sem);
spin_unlock_irqrestore(&ha->mbx_reg_lock, flags);
} }
return IRQ_HANDLED; return IRQ_HANDLED;
......
...@@ -55,7 +55,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp) ...@@ -55,7 +55,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
uint16_t __iomem *optr; uint16_t __iomem *optr;
uint32_t cnt; uint32_t cnt;
uint32_t mboxes; uint32_t mboxes;
unsigned long mbx_flags = 0;
unsigned long wait_time; unsigned long wait_time;
rval = QLA_SUCCESS; rval = QLA_SUCCESS;
...@@ -81,10 +80,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp) ...@@ -81,10 +80,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
/* Save mailbox command for debug */ /* Save mailbox command for debug */
ha->mcp = mcp; ha->mcp = mcp;
/* Try to get mailbox register access */
if (!abort_active)
spin_lock_irqsave(&ha->mbx_reg_lock, mbx_flags);
DEBUG11(printk("scsi(%ld): prepare to issue mbox cmd=0x%x.\n", DEBUG11(printk("scsi(%ld): prepare to issue mbox cmd=0x%x.\n",
ha->host_no, mcp->mb[0])); ha->host_no, mcp->mb[0]));
...@@ -161,9 +156,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp) ...@@ -161,9 +156,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT); WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
spin_unlock_irqrestore(&ha->hardware_lock, flags); spin_unlock_irqrestore(&ha->hardware_lock, flags);
if (!abort_active)
spin_unlock_irqrestore(&ha->mbx_reg_lock, mbx_flags);
/* Wait for either the timer to expire /* Wait for either the timer to expire
* or the mbox completion interrupt * or the mbox completion interrupt
*/ */
...@@ -184,8 +176,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp) ...@@ -184,8 +176,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
else else
WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT); WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
spin_unlock_irqrestore(&ha->hardware_lock, flags); spin_unlock_irqrestore(&ha->hardware_lock, flags);
if (!abort_active)
spin_unlock_irqrestore(&ha->mbx_reg_lock, mbx_flags);
wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */ wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
while (!ha->flags.mbox_int) { while (!ha->flags.mbox_int) {
...@@ -201,9 +191,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp) ...@@ -201,9 +191,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
} /* while */ } /* while */
} }
if (!abort_active)
spin_lock_irqsave(&ha->mbx_reg_lock, mbx_flags);
/* Check whether we timed out */ /* Check whether we timed out */
if (ha->flags.mbox_int) { if (ha->flags.mbox_int) {
uint16_t *iptr2; uint16_t *iptr2;
...@@ -256,9 +243,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp) ...@@ -256,9 +243,6 @@ qla2x00_mailbox_command(scsi_qla_host_t *ha, mbx_cmd_t *mcp)
rval = QLA_FUNCTION_TIMEOUT; rval = QLA_FUNCTION_TIMEOUT;
} }
if (!abort_active)
spin_unlock_irqrestore(&ha->mbx_reg_lock, mbx_flags);
ha->flags.mbox_busy = 0; ha->flags.mbox_busy = 0;
/* Clean up */ /* Clean up */
......
...@@ -1563,14 +1563,6 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) ...@@ -1563,14 +1563,6 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
INIT_LIST_HEAD(&ha->list); INIT_LIST_HEAD(&ha->list);
INIT_LIST_HEAD(&ha->fcports); INIT_LIST_HEAD(&ha->fcports);
/*
* These locks are used to prevent more than one CPU
* from modifying the queue at the same time. The
* higher level "host_lock" will reduce most
* contention for these locks.
*/
spin_lock_init(&ha->mbx_reg_lock);
qla2x00_config_dma_addressing(ha); qla2x00_config_dma_addressing(ha);
if (qla2x00_mem_alloc(ha)) { if (qla2x00_mem_alloc(ha)) {
qla_printk(KERN_WARNING, ha, qla_printk(KERN_WARNING, ha,
......
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