Commit 03d3a1df authored by Cooper Jr., Franklin's avatar Cooper Jr., Franklin Committed by Boris Brezillon

mtd: nand: omap2: Start dma request before enabling prefetch

The prefetch engine sends a dma request once a FIFO threshold has
been met. No other requests are received until the previous request
is handled.

Starting a dma transfer (dma_async_issue_pending) results in any
previous event for the dma channel to be cleared. Therefore, starting
the prefetch engine before initiating the dma transfer may result in
the prefetch triggering a dma request but instead of it being handled
it can end up being cleared. This will result in a hang since the code
will continue to wait for the dma request to complete.

By initiating the dma request before enabling the prefetch engine this
race condition is avoided and no dma request are missed/cleared.
Signed-off-by: default avatarFranklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
parent 77784785
...@@ -503,6 +503,11 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr, ...@@ -503,6 +503,11 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
tx->callback_param = &info->comp; tx->callback_param = &info->comp;
dmaengine_submit(tx); dmaengine_submit(tx);
init_completion(&info->comp);
/* setup and start DMA using dma_addr */
dma_async_issue_pending(info->dma);
/* configure and start prefetch transfer */ /* configure and start prefetch transfer */
ret = omap_prefetch_enable(info->gpmc_cs, ret = omap_prefetch_enable(info->gpmc_cs,
PREFETCH_FIFOTHRESHOLD_MAX, 0x1, len, is_write, info); PREFETCH_FIFOTHRESHOLD_MAX, 0x1, len, is_write, info);
...@@ -510,10 +515,6 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr, ...@@ -510,10 +515,6 @@ static inline int omap_nand_dma_transfer(struct mtd_info *mtd, void *addr,
/* PFPW engine is busy, use cpu copy method */ /* PFPW engine is busy, use cpu copy method */
goto out_copy_unmap; goto out_copy_unmap;
init_completion(&info->comp);
dma_async_issue_pending(info->dma);
/* setup and start DMA using dma_addr */
wait_for_completion(&info->comp); wait_for_completion(&info->comp);
tim = 0; tim = 0;
limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS)); limit = (loops_per_jiffy * msecs_to_jiffies(OMAP_NAND_TIMEOUT_MS));
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment