Commit 03d6d706 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'socfpga_dts_for_v4.2' of...

Merge tag 'socfpga_dts_for_v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt

Pull "SoCFPGA DTS updates for v4.2" from Dinh Nguyen:

- Add accelerometer to sockit
- Update and clean up support for the Arria10 platform
- Add sdmmc_clk/4 clock node SoCFPGA Cyclone5/Arria5
- Update ethernet nodes with multicast/unicast/fifo-depth properties
- Add clocks for Arria10 platform

* tag 'socfpga_dts_for_v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga: dts: add clocks to the Arria10 platform
  ARM: socfpga: dts: Add tx-fifo-depth and rx-fifo-depth properties
  ARM: socfpga: dts: Add multicast bins and unicast filter entries
  ARM: socfpga: dts: Add a clock node for sdmmc CIU
  ARM: socfpga: dts: rename socdk board file to socdk_sdmmc
  ARM: socfpga: dts: enable UART1 for the debug uart
  ARM: socfpga: dts: disable the sdmmc, and uart nodes in the base arria10
  ARM: socfpga: dts: add cpu1-start-addr for Arria 10
  ARM: socfpga: dts: Add adxl34x
parents 9ef1375d da29d824
...@@ -498,7 +498,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \ ...@@ -498,7 +498,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += \
sh73a0-kzm9g.dtb sh73a0-kzm9g.dtb
dtb-$(CONFIG_ARCH_SOCFPGA) += \ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_arria5_socdk.dtb \ socfpga_arria5_socdk.dtb \
socfpga_arria10_socdk.dtb \ socfpga_arria10_socdk_sdmmc.dtb \
socfpga_cyclone5_socdk.dtb \ socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_sockit.dtb \ socfpga_cyclone5_sockit.dtb \
socfpga_cyclone5_socrates.dtb \ socfpga_cyclone5_socrates.dtb \
......
...@@ -451,6 +451,14 @@ sdmmc_clk: sdmmc_clk { ...@@ -451,6 +451,14 @@ sdmmc_clk: sdmmc_clk {
clk-phase = <0 135>; clk-phase = <0 135>;
}; };
sdmmc_clk_divided: sdmmc_clk_divided {
#clock-cells = <0>;
compatible = "altr,socfpga-gate-clk";
clocks = <&sdmmc_clk>;
clk-gate = <0xa0 8>;
fixed-divider = <4>;
};
nand_x_clk: nand_x_clk { nand_x_clk: nand_x_clk {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "altr,socfpga-gate-clk"; compatible = "altr,socfpga-gate-clk";
...@@ -488,6 +496,8 @@ gmac0: ethernet@ff700000 { ...@@ -488,6 +496,8 @@ gmac0: ethernet@ff700000 {
reset-names = "stmmaceth"; reset-names = "stmmaceth";
snps,multicast-filter-bins = <256>; snps,multicast-filter-bins = <256>;
snps,perfect-filter-entries = <128>; snps,perfect-filter-entries = <128>;
tx-fifo-depth = <4096>;
rx-fifo-depth = <4096>;
status = "disabled"; status = "disabled";
}; };
...@@ -504,6 +514,8 @@ gmac1: ethernet@ff702000 { ...@@ -504,6 +514,8 @@ gmac1: ethernet@ff702000 {
reset-names = "stmmaceth"; reset-names = "stmmaceth";
snps,multicast-filter-bins = <256>; snps,multicast-filter-bins = <256>;
snps,perfect-filter-entries = <128>; snps,perfect-filter-entries = <128>;
tx-fifo-depth = <4096>;
rx-fifo-depth = <4096>;
status = "disabled"; status = "disabled";
}; };
...@@ -635,7 +647,7 @@ mmc: dwmmc0@ff704000 { ...@@ -635,7 +647,7 @@ mmc: dwmmc0@ff704000 {
fifo-depth = <0x400>; fifo-depth = <0x400>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
clocks = <&l4_mp_clk>, <&sdmmc_clk>; clocks = <&l4_mp_clk>, <&sdmmc_clk_divided>;
clock-names = "biu", "ciu"; clock-names = "biu", "ciu";
}; };
......
This diff is collapsed.
/* /*
* Copyright (C) 2014 Altera Corporation <www.altera.com> * Copyright (C) 2015 Altera Corporation <www.altera.com>
* *
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
...@@ -14,8 +14,6 @@ ...@@ -14,8 +14,6 @@
* You should have received a copy of the GNU General Public License * You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>. * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
/dts-v1/;
#include "socfpga_arria10.dtsi" #include "socfpga_arria10.dtsi"
/ { / {
...@@ -40,9 +38,9 @@ osc1 { ...@@ -40,9 +38,9 @@ osc1 {
}; };
}; };
}; };
serial0@ffc02000 {
status = "okay";
};
}; };
}; };
&uart1 {
status = "okay";
};
/*
* Copyright (C) 2014-2015 Altera Corporation <www.altera.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/dts-v1/;
#include "socfpga_arria10_socdk.dtsi"
&mmc {
status = "okay";
num-slots = <1>;
broken-cd;
bus-width = <4>;
};
...@@ -68,3 +68,19 @@ &mmc0 { ...@@ -68,3 +68,19 @@ &mmc0 {
&usb1 { &usb1 {
status = "okay"; status = "okay";
}; };
&gpio2 {
status = "okay";
};
&i2c1{
status = "okay";
accel1: accel1@53{
compatible = "adxl34x";
reg = <0x53>;
interrupt-parent = < &portc >;
interrupts = <3 2>;
};
};
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment